Home
last modified time | relevance | path

Searched refs:RCC_CFGR_SWS0 (Results 1 – 25 of 64) sorted by relevance

123

/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7m/stm32f1/
H A Dclock.c39 #define RCC_CFGR_SWS0 (1 << 2) macro
43 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7m/stm32f4/
H A Dclock.c41 #define RCC_CFGR_SWS0 (1 << 2) macro
45 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/
H A Dclk_stm32f.c47 #define RCC_CFGR_SWS0 BIT(2) macro
51 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/
H A Dclk_stm32f.c47 #define RCC_CFGR_SWS0 BIT(2) macro
51 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/clk/
H A Dclk_stm32f.c47 #define RCC_CFGR_SWS0 BIT(2) macro
51 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/clk/
H A Dclk_stm32f.c47 #define RCC_CFGR_SWS0 BIT(2) macro
51 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-tools/u-boot-2020.07/drivers/clk/
H A Dclk_stm32f.c49 #define RCC_CFGR_SWS0 BIT(2) macro
53 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/clk/
H A Dclk_stm32f.c47 #define RCC_CFGR_SWS0 BIT(2) macro
51 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/
H A Dclk_stm32f.c50 #define RCC_CFGR_SWS0 BIT(2) macro
54 #define RCC_CFGR_SWS_HSE RCC_CFGR_SWS0

123