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Searched refs:RCC_PLL2_DIVP (Results 1 – 2 of 2) sorted by relevance

/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_hal_rcc_ex.h374 #define RCC_PLL2_DIVP RCC_PLLCFGR_DIVP2EN macro
2870 #define IS_RCC_PLL2CLOCKOUT_VALUE(VALUE) (((VALUE) == RCC_PLL2_DIVP) || \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_hal_rcc_ex.c2752 __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP); in RCCEx_PLL2_Config()