/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/xtensa/ |
H A D | atomctl.rst | 20 which can implement RCW transactions. For FPGA cards with an External 22 doing a Cached (WB) transaction and use the Memory RCW for un-cached 26 use the memory controllers RCW, thought non-MX controlers likely 31 don't support atomic RCW memory transactions and will likely want to 32 configure this register to not use RCW. 34 Developers might find using RCW in Bypass mode convenient when testing 48 1 RCW Transaction RCW Transaction RCW Transaction
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/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/xtensa/ |
H A D | atomctl.rst | 20 which can implement RCW transactions. For FPGA cards with an External 22 doing a Cached (WB) transaction and use the Memory RCW for un-cached 26 use the memory controllers RCW, thought non-MX controlers likely 31 don't support atomic RCW memory transactions and will likely want to 32 configure this register to not use RCW. 34 Developers might find using RCW in Bypass mode convenient when testing 48 1 RCW Transaction RCW Transaction RCW Transaction
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/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/xtensa/ |
H A D | atomctl.rst | 20 which can implement RCW transactions. For FPGA cards with an External 22 doing a Cached (WB) transaction and use the Memory RCW for un-cached 26 use the memory controllers RCW, thought non-MX controlers likely 31 don't support atomic RCW memory transactions and will likely want to 32 configure this register to not use RCW. 34 Developers might find using RCW in Bypass mode convenient when testing 48 1 RCW Transaction RCW Transaction RCW Transaction
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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/tools/nxp/create_pbl/ |
H A D | README | 6 RCW image is placed first followed by the, 18 -r <RCW file-name> - name of RCW binary file. 42 -r RCW binary file. 50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina… 57 make <compilation command......> pbl RCW=<Path_to_RCW_File>/<rcw_file_name.bin> 61 …make PLAT=ls1046rdb all fip BOOT_MODE=qspi SPD=opteed BL32=tee.bin BL33=u-boot-ls1046.bin pbl RCW=… 65 …OT_MODE=flexspi_nor SPD=opteed BL32=tee_lx2.bin BL33=u-boot_lx2160.bin pbl RCW=plat/nxp/soc-lx2160…
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/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/tools/nxp/create_pbl/ |
H A D | README | 6 RCW image is placed first followed by the, 18 -r <RCW file-name> - name of RCW binary file. 42 -r RCW binary file. 50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina… 57 make <compilation command......> pbl RCW=<Path_to_RCW_File>/<rcw_file_name.bin> 61 …make PLAT=ls1046rdb all fip BOOT_MODE=qspi SPD=opteed BL32=tee.bin BL33=u-boot-ls1046.bin pbl RCW=… 65 …OT_MODE=flexspi_nor SPD=opteed BL32=tee_lx2.bin BL33=u-boot_lx2160.bin pbl RCW=plat/nxp/soc-lx2160…
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/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/tools/nxp/create_pbl/ |
H A D | README | 6 RCW image is placed first followed by the, 18 -r <RCW file-name> - name of RCW binary file. 42 -r RCW binary file. 50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina… 57 make <compilation command......> pbl RCW=<Path_to_RCW_File>/<rcw_file_name.bin> 61 …make PLAT=ls1046rdb all fip BOOT_MODE=qspi SPD=opteed BL32=tee.bin BL33=u-boot-ls1046.bin pbl RCW=… 65 …OT_MODE=flexspi_nor SPD=opteed BL32=tee_lx2.bin BL33=u-boot_lx2160.bin pbl RCW=plat/nxp/soc-lx2160…
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/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/tools/nxp/create_pbl/ |
H A D | README | 6 RCW image is placed first followed by the, 18 -r <RCW file-name> - name of RCW binary file. 42 -r RCW binary file. 50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina… 57 make <compilation command......> pbl RCW=<Path_to_RCW_File>/<rcw_file_name.bin> 61 …make PLAT=ls1046rdb all fip BOOT_MODE=qspi SPD=opteed BL32=tee.bin BL33=u-boot-ls1046.bin pbl RCW=… 65 …OT_MODE=flexspi_nor SPD=opteed BL32=tee_lx2.bin BL33=u-boot_lx2160.bin pbl RCW=plat/nxp/soc-lx2160…
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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/tools/nxp/create_pbl/ |
H A D | README | 6 RCW image is placed first followed by the, 18 -r <RCW file-name> - name of RCW binary file. 42 -r RCW binary file. 50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina… 57 make <compilation command......> pbl RCW=<Path_to_RCW_File>/<rcw_file_name.bin> 61 …make PLAT=ls1046rdb all fip BOOT_MODE=qspi SPD=opteed BL32=tee.bin BL33=u-boot-ls1046.bin pbl RCW=… 65 …OT_MODE=flexspi_nor SPD=opteed BL32=tee_lx2.bin BL33=u-boot_lx2160.bin pbl RCW=plat/nxp/soc-lx2160…
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/freescale/corenet_ds/ |
H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/freescale/corenet_ds/ |
H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p3041ds.cfg | 2 # Default RCW for P3041DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/freescale/corenet_ds/ |
H A D | rcw_p5040ds.cfg | 2 # Default RCW for P5040DS. 5 #PBL preamble and RCW header 7 #64 bytes RCW data
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