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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/Hexagon/
H A Dcirc_new.ll231 ; CHECK: m[[REG18:([0-1])]] = r0
232 ; CHECK: cs[[REG18]] = r1
233 ; CHECK: memb(r1++I:circ(m[[REG18]])) =
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/SystemZ/
H A Dvec-cmp-cmp-logic-select.ll823 ; CHECK-NEXT: vn [[REG18:%v[0-9]+]], [[REG16]], [[REG17]]
826 ; CHECK-NEXT: vsel %v26, %v31, [[REG8]], [[REG18]]

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