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Searched refs:REGISTER_LDST_BASE (Results 1 – 25 of 32) sorted by relevance

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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/panfrost/midgard/
H A Dhelpers.h151 #define REGISTER_LDST_BASE 26 macro
315 assert((reg == REGISTER_LDST_BASE) || (reg == REGISTER_LDST_BASE + 1)); in midgard_ldst_reg()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
H A Dmidgard_emit.c622 ldst.arg_reg = SSA_REG_FROM_FIXED(ins->src[1]) - REGISTER_LDST_BASE; in load_store_from_instr()
628 ldst.index_reg = SSA_REG_FROM_FIXED(ins->src[2]) - REGISTER_LDST_BASE; in load_store_from_instr()
/dports/graphics/libosmesa/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
H A Dmidgard_emit.c622 ldst.arg_reg = SSA_REG_FROM_FIXED(ins->src[1]) - REGISTER_LDST_BASE; in load_store_from_instr()
628 ldst.index_reg = SSA_REG_FROM_FIXED(ins->src[2]) - REGISTER_LDST_BASE; in load_store_from_instr()
/dports/graphics/mesa-libs/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
H A Dmidgard_emit.c622 ldst.arg_reg = SSA_REG_FROM_FIXED(ins->src[1]) - REGISTER_LDST_BASE; in load_store_from_instr()
628 ldst.index_reg = SSA_REG_FROM_FIXED(ins->src[2]) - REGISTER_LDST_BASE; in load_store_from_instr()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
H A Dmidgard_emit.c622 ldst.arg_reg = SSA_REG_FROM_FIXED(ins->src[1]) - REGISTER_LDST_BASE; in load_store_from_instr()
628 ldst.index_reg = SSA_REG_FROM_FIXED(ins->src[2]) - REGISTER_LDST_BASE; in load_store_from_instr()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1989 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
/dports/graphics/mesa-dri/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro
/dports/lang/clover/mesa-21.3.6/src/panfrost/midgard/
H A Ddisassemble.c200 else if (reg == REGISTER_LDST_BASE || reg == REGISTER_LDST_BASE + 1) in print_alu_reg()
201 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_alu_reg()
216 fprintf(fp, "AL%u", reg - REGISTER_LDST_BASE); in print_ldst_write_reg()
1973 interpipe_aliasing ? REGISTER_LDST_BASE : REG_TEX_BASE); in disassemble_midgard()
H A Dhelpers.h175 #define REGISTER_LDST_BASE 26 macro

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