| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pci/controller/ |
| H A D | pcie-altera.c | 31 #define RP_RXCPL_SOP 0x1 macro
213 if ((ctrl & RP_RXCPL_SOP) || (ctrl & RP_RXCPL_EOP) || sop) { in tlp_read_packet()
217 if (ctrl & RP_RXCPL_SOP) { in tlp_read_packet()
248 if (ctrl & RP_RXCPL_SOP) { in s10_tlp_read_packet()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/pci/controller/ |
| H A D | pcie-altera.c | 31 #define RP_RXCPL_SOP 0x1 macro
213 if ((ctrl & RP_RXCPL_SOP) || (ctrl & RP_RXCPL_EOP) || sop) { in tlp_read_packet()
217 if (ctrl & RP_RXCPL_SOP) { in tlp_read_packet()
248 if (ctrl & RP_RXCPL_SOP) { in s10_tlp_read_packet()
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pci/controller/ |
| H A D | pcie-altera.c | 31 #define RP_RXCPL_SOP 0x1 macro
213 if ((ctrl & RP_RXCPL_SOP) || (ctrl & RP_RXCPL_EOP) || sop) { in tlp_read_packet()
217 if (ctrl & RP_RXCPL_SOP) { in tlp_read_packet()
248 if (ctrl & RP_RXCPL_SOP) { in s10_tlp_read_packet()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 19 #define RP_RXCPL_SOP BIT(0) macro
152 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 19 #define RP_RXCPL_SOP BIT(0) macro
152 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 19 #define RP_RXCPL_SOP BIT(0) macro
152 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 19 #define RP_RXCPL_SOP BIT(0) macro
152 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/pci/ |
| H A D | pcie_intel_fpga.c | 23 #define RP_RXCPL_SOP BIT(0) macro
155 if (!(ctrl & RP_RXCPL_SOP)) in tlp_read_packet()
|