/dports/emulators/almostti/AlmostTI-DougMelton-Source/EMULib/Unix/ |
H A D | SndSDL.c | 21 static int RPtr = 0; /* Read pointer into Bufs */ variable 41 Stream[J] = SndData[RPtr]; in AudioHandler() 42 RPtr = RPtr<SndSize-1? RPtr+1:0; in AudioHandler() 60 RPtr = 0; in InitAudio() 117 RPtr = 0; in TrashAudio() 147 return(!SndRate? 0:RPtr>=WPtr? RPtr-WPtr:RPtr-WPtr+SndSize); in GetFreeAudio() 162 for(J=0;(J<Length)&&(RPtr!=WPtr);++J) in WriteAudio()
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H A D | SndUnix.c | 103 static int RPtr = 0; /* Read pointer into Bufs */ variable 117 for(RPtr=WPtr=0;SndRate&&SndData&&(SoundFD>=0);) in ThrHandler() 125 write(SoundFD,SndData+RPtr,SND_BUFSIZE*sizeof(sample)); in ThrHandler() 130 write(SoundFD,SndData+RPtr,SND_BUFSIZE*sizeof(sample)); in ThrHandler() 134 for(J=0;J<SND_BUFSIZE;++J) SndData[RPtr++]=AUDIO_CONV(0); in ThrHandler() 135 if(RPtr>=SndSize) RPtr=0; in ThrHandler() 155 RPtr = 0; in InitAudio() 264 RPtr = 0; in TrashAudio() 312 return(!SndRate? 0:RPtr>=WPtr? RPtr-WPtr:RPtr-WPtr+SndSize); in GetFreeAudio() 327 for(J=0;(J<Length)&&(RPtr!=WPtr);++J) in WriteAudio()
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/ARM/ |
H A D | ArmCompLoadStore.cpp | 310 case 35: LDR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 311 case 37: LDRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 312 case 33: LDRSH(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 313 case 36: LDRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 314 case 32: LDRSB(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 316 case 43: STR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 317 case 41: STRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 318 case 40: STRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem()
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H A D | ArmCompVFPUNEON.cpp | 190 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 193 VLD1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 234 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 237 VST1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 315 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 318 VLD1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ() 380 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 383 VST1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ()
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H A D | ArmRegCache.h | 124 …ArmGen::ARMReg RPtr(MIPSGPReg preg); // Returns a cached register, while checking that it's mapped…
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H A D | ArmCompFPU.cpp | 110 VLDR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 154 VSTR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/ARM/ |
H A D | ArmCompLoadStore.cpp | 310 case 35: LDR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 311 case 37: LDRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 312 case 33: LDRSH(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 313 case 36: LDRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 314 case 32: LDRSB(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 316 case 43: STR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 317 case 41: STRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 318 case 40: STRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem()
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H A D | ArmCompVFPUNEON.cpp | 190 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 193 VLD1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 234 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 237 VST1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 315 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 318 VLD1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ() 380 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 383 VST1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ()
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H A D | ArmRegCache.h | 124 …ArmGen::ARMReg RPtr(MIPSGPReg preg); // Returns a cached register, while checking that it's mapped…
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H A D | ArmCompFPU.cpp | 110 VLDR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 154 VSTR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/ARM/ |
H A D | ArmCompLoadStore.cpp | 310 case 35: LDR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 311 case 37: LDRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 312 case 33: LDRSH(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 313 case 36: LDRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 314 case 32: LDRSB(gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 316 case 43: STR (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 317 case 41: STRH (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem() 318 case 40: STRB (gpr.R(rt), gpr.RPtr(rs), Operand2(offset, TYPE_IMM)); break; in Comp_ITypeMem()
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H A D | ArmCompVFPUNEON.cpp | 190 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 193 VLD1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 234 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SV() 237 VST1_lane(F_32, ar, gpr.RPtr(rs), 0, true); in CompNEON_SV() 315 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 318 VLD1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ() 380 ADDI2R(R0, gpr.RPtr(rs), offset, R1); in CompNEON_SVQ() 383 VST1(F_32, ar, gpr.RPtr(rs), 2, ALIGN_128); in CompNEON_SVQ()
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H A D | ArmRegCache.h | 124 …ArmGen::ARMReg RPtr(MIPSGPReg preg); // Returns a cached register, while checking that it's mapped…
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H A D | ArmCompFPU.cpp | 110 VLDR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 154 VSTR(fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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/dports/emulators/ppsspp/ppsspp-1.12.3/Core/MIPS/ARM64/ |
H A D | Arm64CompLoadStore.cpp | 333 case 35: LDR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 334 case 37: LDRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 335 case 33: LDRSH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 336 case 36: LDRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 337 case 32: LDRSB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 339 case 43: STR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 340 case 41: STRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 341 case 40: STRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem()
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H A D | Arm64CompFPU.cpp | 98 fp.LDR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 130 fp.STR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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H A D | Arm64RegCache.h | 131 …Arm64Gen::ARM64Reg RPtr(MIPSGPReg preg); // Returns a cached register, if it has been mapped as a …
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/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/Core/MIPS/ARM64/ |
H A D | Arm64CompLoadStore.cpp | 333 case 35: LDR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 334 case 37: LDRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 335 case 33: LDRSH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 336 case 36: LDRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 337 case 32: LDRSB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 339 case 43: STR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 340 case 41: STRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 341 case 40: STRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem()
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H A D | Arm64CompFPU.cpp | 98 fp.LDR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 130 fp.STR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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H A D | Arm64RegCache.h | 131 …Arm64Gen::ARM64Reg RPtr(MIPSGPReg preg); // Returns a cached register, if it has been mapped as a …
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/Core/MIPS/ARM64/ |
H A D | Arm64CompLoadStore.cpp | 333 case 35: LDR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 334 case 37: LDRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 335 case 33: LDRSH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 336 case 36: LDRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 337 case 32: LDRSB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 339 case 43: STR(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 340 case 41: STRH(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem() 341 case 40: STRB(INDEX_UNSIGNED, targetReg, gpr.RPtr(rs), offset); break; in Comp_ITypeMem()
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H A D | Arm64CompFPU.cpp | 98 fp.LDR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS() 130 fp.STR(32, INDEX_UNSIGNED, fpr.R(ft), gpr.RPtr(rs), offset); in Comp_FPULS()
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/dports/science/qmcpack/qmcpack-3.11.0/external_codes/boost_multi/multi/adaptors/blas/ |
H A D | dot.hpp | 18 template<class Context, class XIt, class Size, class YIt, class RPtr> 19 auto dot_n(Context&& ctxt, XIt x_first, Size count, YIt y_first, RPtr rp){ in dot_n() 32 template<class XIt, class Size, class YIt, class RPtr> 33 auto dot_n(XIt x_first, Size count, YIt y_first, RPtr rp) in dot_n()
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/dports/games/libretro-scummvm/scummvm-7b1e929/engines/sword25/math/ |
H A D | geometry_script.cpp | 339 Region *RPtr = checkRegion(L); in r_getCentroid() local 340 assert(RPtr); in r_getCentroid() 342 Vertex::vertexToLuaVertex(L, RPtr->getCentroid()); in r_getCentroid()
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/dports/games/scummvm/scummvm-2.5.1/engines/sword25/math/ |
H A D | geometry_script.cpp | 339 Region *RPtr = checkRegion(L); in r_getCentroid() local 340 assert(RPtr); in r_getCentroid() 342 Vertex::vertexToLuaVertex(L, RPtr->getCentroid()); in r_getCentroid()
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