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Searched refs:RTC_STAT_REG_ADDR (Results 1 – 25 of 267) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
66 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
81 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
82 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
113 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
114 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
125 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
126 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/rtc/
H A Disl1208.c52 #define RTC_STAT_REG_ADDR 0x7 macro
79 status = rtc_read (RTC_STAT_REG_ADDR); in rtc_get()
94 rtc_write(RTC_STAT_REG_ADDR, in rtc_get()
95 rtc_read(RTC_STAT_REG_ADDR) &~ (RTC_STAT_BIT_BAT|RTC_STAT_BIT_RTCF)); in rtc_get()
126 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
127 rtc_read(RTC_STAT_REG_ADDR) | RTC_STAT_BIT_WRTC); in rtc_set()
138 rtc_write(RTC_STAT_REG_ADDR, in rtc_set()
139 rtc_read(RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_WRTC); in rtc_set()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/rtc/
H A Disl1208.c39 #define RTC_STAT_REG_ADDR 0x7 macro
85 if (buf[RTC_STAT_REG_ADDR] & RTC_STAT_BIT_RTCF) { in isl1208_rtc_get()
87 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
92 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_get()
130 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
136 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
153 ret = dm_i2c_read(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()
158 ret = dm_i2c_write(dev, RTC_STAT_REG_ADDR, &val, sizeof(val)); in isl1208_rtc_set()

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