/dports/devel/spirv-llvm-translator/SPIRV-LLVM-Translator-13.0.0/lib/SPIRV/libSPIRV/ |
H A D | SPIRV.debug.h | 191 Reg10 = 88, enumerator 682 { Reg10, 1 }, 945 add(dwarf::DW_OP_reg10, SPIRVDebug::Reg10); in init()
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/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/AdaptorOCL/SPIRV/libSPIRV/ |
H A D | SPIRVDebugInfoExt.h | 209 Reg10 = 88, enumerator 377 { Reg10, 1 },
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2460 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2466 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2468 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2460 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2466 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2468 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2460 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2466 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2468 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2468 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2474 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2476 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2419 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2425 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2427 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2404 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2410 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2412 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2664 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2670 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2672 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2921 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2927 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2929 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2921 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2927 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2929 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2805 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2811 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2813 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2846 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2852 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2854 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2921 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2927 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2929 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2930 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2936 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2938 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2921 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2927 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2929 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2805 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2811 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2813 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2800 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2806 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2808 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 2921 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D; in adjustForSegmentedStacks() local 2927 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10); in adjustForSegmentedStacks() 2929 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10) in adjustForSegmentedStacks()
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/dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/AdaptorOCL/SPIRV/ |
H A D | SPIRVReader.cpp | 331 CASE(dwarf::DW_OP_reg10, SPIRVDebug::ExpressionOpCode::Reg10); in createExpression()
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/dports/devel/patch/patch-2.7.6/ |
H A D | ChangeLog-2011 | 2765 Reg1, Reg2, Reg3, Reg4, Reg5, Reg6, Reg7, Reg8, Reg9, Reg10, Reg11,
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