| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 25656 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
25657 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
25664 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
25667 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
25696 assert(((Regs64bit == (BasePtr == X86::RBX)) || BasePtr == X86::EBX) && in ReplaceNodeResults()
25698 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
25701 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
25709 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
25711 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
25718 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 27897 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
27898 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
27900 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
27907 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
27910 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
27941 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
27944 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
27952 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
27954 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
27961 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 26836 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
26837 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
26844 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
26847 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
26876 assert(((Regs64bit == (BasePtr == X86::RBX)) || BasePtr == X86::EBX) && in ReplaceNodeResults()
26878 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
26881 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
26889 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
26891 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
26898 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29309 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
29310 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
29312 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
29319 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
29322 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
29353 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
29356 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
29364 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
29366 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
29373 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29306 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
29307 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
29309 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
29316 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
29319 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
29350 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
29353 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
29361 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
29363 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
29370 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 29309 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
29310 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
29312 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
29319 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
29322 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
29353 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
29356 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
29364 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
29366 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
29373 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30016 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
30017 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
30019 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
30026 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30029 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
30060 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
30063 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
30071 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
30073 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
30080 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30017 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
30018 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
30020 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
30027 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30030 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
30061 unsigned Opcode = Regs64bit ? X86ISD::LCMPXCHG16_SAVE_RBX_DAG in ReplaceNodeResults()
30064 Regs64bit ? X86::RBX : X86::EBX, in ReplaceNodeResults()
30072 Regs64bit ? X86ISD::LCMPXCHG16_DAG : X86ISD::LCMPXCHG8_DAG; in ReplaceNodeResults()
30074 Regs64bit ? X86::RBX : X86::EBX, swapInL, in ReplaceNodeResults()
30081 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30473 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
30474 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
30476 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
30483 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30486 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
30494 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
30506 if (Regs64bit) { in ReplaceNodeResults()
30521 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30524 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31223 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
31224 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
31226 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
31233 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31236 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
31244 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
31256 if (Regs64bit) { in ReplaceNodeResults()
31271 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31274 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31223 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
31224 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
31226 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
31233 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31236 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
31244 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
31256 if (Regs64bit) { in ReplaceNodeResults()
31271 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31274 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30701 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
30702 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
30704 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
30711 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30714 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
30722 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
30734 if (Regs64bit) { in ReplaceNodeResults()
30749 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30752 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31217 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
31218 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
31220 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
31227 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31230 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
31238 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
31250 if (Regs64bit) { in ReplaceNodeResults()
31265 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31268 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31223 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
31224 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
31226 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
31233 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31236 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
31244 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
31256 if (Regs64bit) { in ReplaceNodeResults()
31271 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31274 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 30701 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
30702 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
30704 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
30711 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30714 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
30722 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
30734 if (Regs64bit) { in ReplaceNodeResults()
30749 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
30752 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 31223 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
31224 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
31226 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
31233 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31236 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
31244 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
31256 if (Regs64bit) { in ReplaceNodeResults()
31271 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
31274 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 32029 bool Regs64bit = T == MVT::i128; in ReplaceNodeResults() local
32030 assert((!Regs64bit || Subtarget.hasCmpxchg16b()) && in ReplaceNodeResults()
32032 MVT HalfT = Regs64bit ? MVT::i64 : MVT::i32; in ReplaceNodeResults()
32039 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
32042 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
32050 DAG.getCopyToReg(cpInH.getValue(0), dl, Regs64bit ? X86::RCX : X86::ECX, in ReplaceNodeResults()
32062 if (Regs64bit) { in ReplaceNodeResults()
32077 Regs64bit ? X86::RAX : X86::EAX, in ReplaceNodeResults()
32080 Regs64bit ? X86::RDX : X86::EDX, in ReplaceNodeResults()
|