/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPchInitCommonLib/ |
H A D | PchInitCommon.c | 94 UINT32 RpDevice; in PchSbiRpPciRead32() local 98 RpDevice = PchGetPcieRpDevice (RpIndex); in PchSbiRpPciRead32() 99 Fid = (UINT16) ((RpDevice << 3) | (RpIndex % 4 )); in PchSbiRpPciRead32() 112 … Read Failed of RpIndex %d Offset 0x%x. Device = %d Fid = 0x%x\n",RpIndex, Offset, RpDevice, Fid)); in PchSbiRpPciRead32() 137 UINT32 RpDevice; in PchSbiRpPciAndThenOr32() local 142 RpDevice = PchGetPcieRpDevice (RpIndex); in PchSbiRpPciAndThenOr32() 147 Fid = (UINT16) ((RpDevice << 3) | (RpIndex % 4 )); in PchSbiRpPciAndThenOr32() 160 …Write Failed of RpIndex %d Offset 0x%x. Device = %d Fid = 0x%x\n",RpIndex, Offset, RpDevice, Fid)); in PchSbiRpPciAndThenOr32()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/PchInit/Smm/ |
H A D | PchPcieSmm.c | 42 IN UINT8 RpDevice, in PchPcieSmi() argument 58 (UINT32) RpDevice, in PchPcieSmi() 91 RpDevice, in PchPcieSmi() 99 RpDevice, in PchPcieSmi() 190 UINTN RpDevice; in PchPciePmIoTrapSmiCallback() local 196 GetPchPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); in PchPciePmIoTrapSmiCallback() 197 …S (DEFAULT_PCI_SEGMENT_NUMBER_PCH, DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunct… in PchPciePmIoTrapSmiCallback() 203 (UINT8)RpDevice, in PchPciePmIoTrapSmiCallback() 283 UINTN RpDevice; in InitializePchPcieSmm() local 338 GetPchPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); in InitializePchPcieSmm() [all …]
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/SystemAgent/SaInit/Smm/ |
H A D | CpuPcieSmm.c | 55 UINTN RpDevice; 61 GetCpuPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); 62 …RpBase = PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_MC_BUS, (UINT32) RpDevice, (UINT32) RpFunction, 0… 70 (UINT8)RpDevice, 96 IN UINT8 RpDevice, 113 (UINT32) RpDevice, 152 RpDevice, 161 RpDevice, 315 UINTN RpDevice; 357 GetCpuPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); [all …]
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/ |
H A D | TbtSmm.c | 630 IN UINTN RpDevice, in ThunderboltEnableAspmWithoutLtr() argument 661 RootDev = (UINT8)RpDevice; in ThunderboltEnableAspmWithoutLtr() 806 IN UINTN RpDevice, in ThunderboltEnableL1Sub() argument 822 IN UINTN RpDevice, in ThunderboltDisableAspmWithoutLtr() argument 850 RootDev = (UINT8)RpDevice; in ThunderboltDisableAspmWithoutLtr() 953 IN UINTN RpDevice, in ConfigureTbtPm() argument 1058 IN UINTN RpDevice, in ConfigureLtr() argument 1167 IN UINTN RpDevice, in ThunderboltSetLatencyLtr() argument 1712 IN UINTN RpDevice, in EndOfThunderboltCallback() argument 1730 ConfigureLtr (RpSegment, RpBus, RpDevice, RpFunction); in EndOfThunderboltCallback() [all …]
|
H A D | TbtSmiHandler.h | 160 IN UINTN RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/ |
H A D | TbtSmm.c | 630 IN UINTN RpDevice, in ThunderboltEnableAspmWithoutLtr() argument 661 RootDev = (UINT8)RpDevice; in ThunderboltEnableAspmWithoutLtr() 806 IN UINTN RpDevice, in ThunderboltEnableL1Sub() argument 822 IN UINTN RpDevice, in ThunderboltDisableAspmWithoutLtr() argument 850 RootDev = (UINT8)RpDevice; in ThunderboltDisableAspmWithoutLtr() 953 IN UINTN RpDevice, in ConfigureTbtPm() argument 1058 IN UINTN RpDevice, in ConfigureLtr() argument 1167 IN UINTN RpDevice, in ThunderboltSetLatencyLtr() argument 1712 IN UINTN RpDevice, in EndOfThunderboltCallback() argument 1730 ConfigureLtr (RpSegment, RpBus, RpDevice, RpFunction); in EndOfThunderboltCallback() [all …]
|
H A D | TbtSmiHandler.h | 160 IN UINTN RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/ |
H A D | TbtSmm.c | 631 IN UINTN RpDevice, in ThunderboltEnableAspmWithoutLtr() argument 662 RootDev = (UINT8)RpDevice; in ThunderboltEnableAspmWithoutLtr() 807 IN UINTN RpDevice, in ThunderboltEnableL1Sub() argument 823 IN UINTN RpDevice, in ThunderboltDisableAspmWithoutLtr() argument 851 RootDev = (UINT8)RpDevice; in ThunderboltDisableAspmWithoutLtr() 954 IN UINTN RpDevice, in ConfigureTbtPm() argument 1059 IN UINTN RpDevice, in ConfigureLtr() argument 1168 IN UINTN RpDevice, in ThunderboltSetLatencyLtr() argument 1713 IN UINTN RpDevice, in EndOfThunderboltCallback() argument 1731 ConfigureLtr (RpSegment, RpBus, RpDevice, RpFunction); in EndOfThunderboltCallback() [all …]
|
H A D | TbtSmiHandler.h | 160 IN UINTN RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/ |
H A D | PchPcieSmm.c | 39 IN UINT8 RpDevice, in PchPcieSmi() argument 56 (UINT32) RpDevice, in PchPcieSmi() 77 RpDevice, in PchPcieSmi() 183 UINTN RpDevice; in PchPciePmIoTrapSmiCallback() local 207 GetPchPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); in PchPciePmIoTrapSmiCallback() 208 RpBase = MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction); in PchPciePmIoTrapSmiCallback() 300 UINTN RpDevice; in InitializePchPcieSmm() local 358 GetPchPcieRpDevFun (PortIndex, &RpDevice, &RpFunction); in InitializePchPcieSmm() 359 RpBase = MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction); in InitializePchPcieSmm()
|
H A D | PchInitSmm.h | 153 IN UINT8 RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/Fru/TglCpu/CpuPcieRp/Library/PeiDxeSmmCpuPcieInfoFruLib/ |
H A D | CpuPcieInfoFruLib.c | 77 UINTN RpDevice; in CpuPcieBase() local 79 GetCpuPcieRpDevFun (RpIndex, &RpDevice, &RpFunction); in CpuPcieBase() 80 return PCI_SEGMENT_LIB_ADDRESS (SA_SEG_NUM, SA_MC_BUS, (UINT32) RpDevice, (UINT32) RpFunction, 0); in CpuPcieBase()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/PeiDxeSmmPchInitCommonLib/ |
H A D | PchInitCommon.c | 95 UINT32 RpDevice; in PchSbiRpPciRead32() local 100 RpDevice = PchGetPcieRpDevice (RpIndex); in PchSbiRpPciRead32() 101 Fid = (UINT16) ((RpDevice << 3) | (RpIndex % 4 )); in PchSbiRpPciRead32() 139 UINT32 RpDevice; in PchSbiRpPciAndThenOr32() local 144 RpDevice = PchGetPcieRpDevice (RpIndex); in PchSbiRpPciAndThenOr32() 149 Fid = (UINT16) ((RpDevice << 3) | (RpIndex % 4 )); in PchSbiRpPciAndThenOr32()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPchPcieRpLib/ |
H A D | PchPcieRpLib.c | 123 UINTN RpDevice; in PchPcieBase() local 126 GetPchPcieRpDevFun (RpIndex, &RpDevice, &RpFunction); in PchPcieBase() 128 …S (DEFAULT_PCI_SEGMENT_NUMBER_PCH, DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunct… in PchPcieBase()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/PeiDxeSmmRstPrivateLib/ |
H A D | PeiDxeSmmRstPrivateLib.c | 26 UINTN RpDevice; in RstGetProgInterfaceForRemapDevice() local 38 GetPchPcieRpDevFun (RpNumber, &RpDevice, &RpFunction); in RstGetProgInterfaceForRemapDevice() 41 RpBase = MmPciBase (BusNumber, (UINT32) RpDevice, (UINT32) RpFunction); in RstGetProgInterfaceForRemapDevice()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PcieRp/IncludePrivate/Library/ |
H A D | PciExpressHelpersLib.h | 84 UINT8 RpDevice, 121 UINT8 RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchPcieRpLib/ |
H A D | PchPcieRpLib.c | 182 UINTN RpDevice; in PchPcieBase() local 184 GetPchPcieRpDevFun (RpIndex, &RpDevice, &RpFunction); in PchPcieBase() 185 return MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction); in PchPcieBase()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Smm/ |
H A D | PchPcieSmm.c | 45 IN UINT8 RpDevice, 61 (UINT32) RpDevice, 94 RpDevice, 103 RpDevice,
|
H A D | PchInitSmm.h | 92 IN UINT8 RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/ |
H A D | PchPciExpressHelpersLib.h | 296 UINT8 RpDevice, 330 UINT8 RpDevice,
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/ |
H A D | PeiPchPolicyUpdatePreMem.c | 41 UINTN RpDevice; in InstallPlatformHsioPtssTable() local 113 Status = GetPchPcieRpDevFun (PciePort, &RpDevice, &RpFunction); in InstallPlatformHsioPtssTable() 116 RpBase = MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction); in InstallPlatformHsioPtssTable()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/ |
H A D | PeiPchPolicyUpdatePreMem.c | 41 UINTN RpDevice; in InstallPlatformHsioPtssTable() local 113 Status = GetPchPcieRpDevFun (PciePort, &RpDevice, &RpFunction); in InstallPlatformHsioPtssTable() 116 RpBase = MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction); in InstallPlatformHsioPtssTable()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPchPciExpressHelpersLib/ |
H A D | PchPciExpressHelpersLibrary.c | 2185 UINT8 RpDevice, in ConfigureEoiForwarding() argument 2193 RpBase = PCI_SEGMENT_LIB_ADDRESS (RpSegment, RpBus, RpDevice, RpFunction, 0); in ConfigureEoiForwarding() 2284 UINT8 RpDevice, in RootportDownstreamConfiguration() argument 2296 RpBase = PCI_SEGMENT_LIB_ADDRESS (RpSegment, RpBus, RpDevice, RpFunction, 0); in RootportDownstreamConfiguration() 2302 RpSbdf.Dev = RpDevice; in RootportDownstreamConfiguration() 2306 DEBUG ((DEBUG_INFO, "RootportDownstreamConfiguration %x:%x\n", RpDevice, RpFunction)); in RootportDownstreamConfiguration() 2314 ConfigureEoiForwarding (RpSegment, RpBus, RpDevice, RpFunction, IoApicPresent); in RootportDownstreamConfiguration() 2349 UINT8 RpDevice, in RootportDownstreamPmConfiguration() argument 2364 RpBase = PCI_SEGMENT_LIB_ADDRESS (RpSegment, RpBus, RpDevice, RpFunction, 0); in RootportDownstreamPmConfiguration() 2371 DEBUG ((DEBUG_INFO, "RootportDownstreamPmConfiguration %x:%x\n", RpDevice, RpFunction)); in RootportDownstreamPmConfiguration() [all …]
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/PcieRp/LibraryPrivate/PciExpressHelpersLibrary/ |
H A D | PciExpressHelpersLibrary.c | 1685 UINT8 RpDevice, in RootportDownstreamConfiguration() argument 1699 RpBase = PCI_SEGMENT_LIB_ADDRESS (RpSegment, RpBus, RpDevice, RpFunction, 0); in RootportDownstreamConfiguration() 1705 RpSbdf.Dev = RpDevice; in RootportDownstreamConfiguration() 1709 DEBUG ((DEBUG_INFO, "RootportDownstreamConfiguration %x:%x\n", RpDevice, RpFunction)); in RootportDownstreamConfiguration() 1936 UINT8 RpDevice, in RootportDownstreamPmConfiguration() argument 1952 RpBase = PCI_SEGMENT_LIB_ADDRESS (RpSegment, RpBus, RpDevice, RpFunction, 0); in RootportDownstreamPmConfiguration() 1959 DEBUG ((DEBUG_INFO, "RootportDownstreamPmConfiguration %x:%x\n", RpDevice, RpFunction)); in RootportDownstreamPmConfiguration() 1967 RpSbdf.Dev = RpDevice; in RootportDownstreamPmConfiguration()
|
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/ |
H A D | PeiSiliconPolicyUpdateLib.c | 178 UINTN RpDevice; 258 Status = GetPchPcieRpDevFun (PciePort, &RpDevice, &RpFunction); 261 RpBase = MmPciBase (DEFAULT_PCI_BUS_NUMBER_PCH, (UINT32) RpDevice, (UINT32) RpFunction);
|