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Searched refs:SADIV (Results 1 – 25 of 77) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/pxa/
H A Dpxa2xx-i2s.c37 #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ macro
191 SADIV = 0x48; in pxa2xx_i2s_hw_params()
194 SADIV = 0x34; in pxa2xx_i2s_hw_params()
197 SADIV = 0x24; in pxa2xx_i2s_hw_params()
200 SADIV = 0x1a; in pxa2xx_i2s_hw_params()
203 SADIV = 0xd; in pxa2xx_i2s_hw_params()
206 SADIV = 0xc; in pxa2xx_i2s_hw_params()
209 SADIV = 0x6; in pxa2xx_i2s_hw_params()
270 pxa_i2s.sadiv = SADIV; in pxa2xx_soc_pcm_suspend()
285 SADIV = pxa_i2s.sadiv; in pxa2xx_soc_pcm_resume()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/pxa/
H A Dpxa2xx-i2s.c37 #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ macro
191 SADIV = 0x48; in pxa2xx_i2s_hw_params()
194 SADIV = 0x34; in pxa2xx_i2s_hw_params()
197 SADIV = 0x24; in pxa2xx_i2s_hw_params()
200 SADIV = 0x1a; in pxa2xx_i2s_hw_params()
203 SADIV = 0xd; in pxa2xx_i2s_hw_params()
206 SADIV = 0xc; in pxa2xx_i2s_hw_params()
209 SADIV = 0x6; in pxa2xx_i2s_hw_params()
270 pxa_i2s.sadiv = SADIV; in pxa2xx_soc_pcm_suspend()
285 SADIV = pxa_i2s.sadiv; in pxa2xx_soc_pcm_resume()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/pxa/
H A Dpxa2xx-i2s.c37 #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ macro
191 SADIV = 0x48; in pxa2xx_i2s_hw_params()
194 SADIV = 0x34; in pxa2xx_i2s_hw_params()
197 SADIV = 0x24; in pxa2xx_i2s_hw_params()
200 SADIV = 0x1a; in pxa2xx_i2s_hw_params()
203 SADIV = 0xd; in pxa2xx_i2s_hw_params()
206 SADIV = 0xc; in pxa2xx_i2s_hw_params()
209 SADIV = 0x6; in pxa2xx_i2s_hw_params()
270 pxa_i2s.sadiv = SADIV; in pxa2xx_soc_pcm_suspend()
285 SADIV = pxa_i2s.sadiv; in pxa2xx_soc_pcm_resume()
/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/
H A Di2s.h88 #define SADIV I2S_pointer->sadiv macro
/dports/emulators/qemu/qemu-6.2.0/hw/arm/
H A Dpxa2xx.c1623 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1642 case SADIV: in pxa2xx_i2s_read()
1697 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Dpxa2xx.c1597 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1616 case SADIV: in pxa2xx_i2s_read()
1669 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Dpxa2xx.c1623 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1642 case SADIV: in pxa2xx_i2s_read()
1697 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Dpxa2xx.c1597 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1616 case SADIV: in pxa2xx_i2s_read()
1669 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Dpxa2xx.c1593 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1612 case SADIV: in pxa2xx_i2s_read()
1665 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Dpxa2xx.c1622 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1641 case SADIV: in pxa2xx_i2s_read()
1696 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Dpxa2xx.c1602 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1621 case SADIV: in pxa2xx_i2s_read()
1674 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Dpxa2xx.c1602 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1621 case SADIV: in pxa2xx_i2s_read()
1674 case SADIV: in pxa2xx_i2s_write()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/
H A Dpxa2xx.c1623 #define SADIV 0x60 /* Serial Audio Clock Divider register */ macro
1642 case SADIV: in pxa2xx_i2s_read()
1697 case SADIV: in pxa2xx_i2s_write()
/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/
H A Dpxa255regs.h404 #define SADIV __REG(I2S_BASE+0x0060) /* Audio Clock Divider Register. */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h358 #define SADIV 0x40400060 /* Audio Clock Divider Register. */ macro

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