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Searched refs:SCR_REG_L (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu/qemu-6.2.0/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu60/qemu-6.0.0/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/display/
H A Dtc6393xb.c212 #define SCR_REG_L(N) \ macro
252 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
265 #undef SCR_REG_L
273 #define SCR_REG_L(N) \ macro
313 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
326 #undef SCR_REG_L
/dports/emulators/qemu5/qemu-5.2.0/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu-utils/qemu-4.2.1/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/display/
H A Dtc6393xb.c198 #define SCR_REG_L(N) \ macro
238 SCR_REG_L(PLL1CR); in tc6393xb_scr_readb()
251 #undef SCR_REG_L
259 #define SCR_REG_L(N) \ macro
299 SCR_REG_L(PLL1CR); in tc6393xb_scr_writeb()
312 #undef SCR_REG_L