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Searched refs:SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 (Results 1 – 25 of 67) sorted by relevance

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/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/imx/common/include/
H A Dimx8qx_pads.h65 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/imx/common/include/
H A Dimx8qx_pads.h65 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/imx/common/include/
H A Dimx8qx_pads.h65 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/imx/common/include/
H A Dimx8qx_pads.h65 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/imx/common/include/
H A Dimx8qx_pads.h65 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h52 #define SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 43 /* */ macro
315 …ne SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0 0

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