/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/dt-bindings/pinctrl/ |
H A D | pads-imx8qxp.h | 93 #define SC_P_SAI0_RXD 84 /* ADMA.SAI0.RXD, ADMA.SAI1.RXFS, ADMA.SPI1.CS0… macro 473 #define SC_P_SAI0_RXD_ADMA_SAI0_RXD SC_P_SAI0_RXD 0 474 #define SC_P_SAI0_RXD_ADMA_SAI1_RXFS SC_P_SAI0_RXD 1 475 #define SC_P_SAI0_RXD_ADMA_SPI1_CS0 SC_P_SAI0_RXD 2 476 #define SC_P_SAI0_RXD_ADMA_LCDIF_D20 SC_P_SAI0_RXD 3 477 #define SC_P_SAI0_RXD_LSIO_GPIO0_IO27 SC_P_SAI0_RXD 4
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