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Searched refs:SC_P_SIM0_PD (Results 1 – 25 of 62) sorted by relevance

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/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qm.h12 #define SC_P_SIM0_PD 3 /* DMA.SIM0.PD, DMA.I2C3.SCL, LSIO.GPIO0.IO03 */ macro
291 #define SC_P_SIM0_PD_DMA_SIM0_PD SC_P_SIM0_PD 0
292 #define SC_P_SIM0_PD_DMA_I2C3_SCL SC_P_SIM0_PD 1
293 #define SC_P_SIM0_PD_LSIO_GPIO0_IO03 SC_P_SIM0_PD 3

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