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Searched refs:SC_P_USDHC1_DATA0 (Results 1 – 25 of 185) sorted by relevance

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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS…
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-sopine/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-rpi/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/dt-bindings/pinctrl/
H A Dpads-imx8qxp.h41 #define SC_P_USDHC1_DATA0 32 /* CONN.USDHC1.DATA0, CONN.NAND.CE1_B, ADMA.MQS… macro
276 #define SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 SC_P_USDHC1_DATA0 0
277 #define SC_P_USDHC1_DATA0_CONN_NAND_CE1_B SC_P_USDHC1_DATA0 1
278 #define SC_P_USDHC1_DATA0_ADMA_MQS_L SC_P_USDHC1_DATA0 2
279 #define SC_P_USDHC1_DATA0_LSIO_GPIO4_IO25 SC_P_USDHC1_DATA0 4

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