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Searched refs:SDA_BASE_REG (Results 1 – 25 of 70) sorted by relevance

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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/config/frv/
H A Dfrv.c333 && REGNO (op0) == SDA_BASE_REG) in plus_small_data_p()
679 fixed_regs[SDA_BASE_REG] = call_used_regs[SDA_BASE_REG] = 0; in frv_conditional_register_usage()
2485 if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG in frv_print_operand_memory_reference()
2497 if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG in frv_print_operand_memory_reference()
2668 fputs (reg_names[SDA_BASE_REG], file); in frv_print_operand()
3371 && regno0 == SDA_BASE_REG in frv_legitimate_address_p()
3377 if (!condexec_p && regno0 == SDA_BASE_REG && const_small_data_p (x1)) in frv_legitimate_address_p()
3432 ret = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SDA_BASE_REG), x); in frv_legitimize_address()
3797 if (REGNO (op) != SDA_BASE_REG) in small_data_register_operand()
5227 base_regno = SDA_BASE_REG; in frv_emit_movsi()
[all …]
H A Dfrv.h767 #define SDA_BASE_REG ((unsigned)(flag_pic ? PIC_REGNO : (GPR_FIRST+16))) macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/config/frv/
H A Dfrv.c333 && REGNO (op0) == SDA_BASE_REG)
679 fixed_regs[SDA_BASE_REG] = call_used_regs[SDA_BASE_REG] = 0;
2485 if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG
2497 if (x0 && GET_CODE (x0) == REG && REGNO (x0) == SDA_BASE_REG
2668 fputs (reg_names[SDA_BASE_REG], file);
3371 && regno0 == SDA_BASE_REG
3377 if (!condexec_p && regno0 == SDA_BASE_REG && const_small_data_p (x1))
3432 ret = gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, SDA_BASE_REG), x);
3797 if (REGNO (op) != SDA_BASE_REG)
5227 base_regno = SDA_BASE_REG;
[all …]
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc9/gcc-9.4.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc11/gcc-11.2.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc10/gcc-10.3.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc8/gcc-8.5.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/frv/
H A Dfrv.h398 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/frv/
H A Dfrv.h412 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gnat_util/gcc-6-20180516/gcc/config/frv/
H A Dfrv.h412 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc48/gcc-4.8.5/gcc/config/frv/
H A Dfrv.h412 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/frv/
H A Dfrv.h412 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/frv/
H A Dfrv.h412 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/frv/
H A Dfrv.h591 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) macro

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