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Searched refs:SDR0_SDSTP0 (Results 1 – 25 of 32) sorted by relevance

12

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/bamboo/
H A DREADME20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/doc/
H A DREADME.bamboo20 SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
21 SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
22 SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
24 SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
27 SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
29 SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
30 SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
31 SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
35 SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
38 SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/
H A Dppc440.h44 #define SDR0_SDSTP0 0x0020 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c248 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
336 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
452 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c92 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/
H A Dspeed.c266 mfsdr(SDR0_SDSTP0, strp0); in get_sys_info()
354 mfsdr(SDR0_SDSTP0, reg); in get_sys_info()
470 mfsdr( SDR0_SDSTP0,strp0 ); in get_sys_info()
H A Dreginfo.c105 {"SDR0_SDSTP0", IDCR6, SDR0_SDSTP0},

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