| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/ |
| H A D | ppc460sx.h | 21 #define SDR0_SRST0_DMC 0x00200000 macro
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| H A D | ppc440sp.h | 37 #define SDR0_SRST0_DMC 0x00200000 macro
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| H A D | ppc440spe.h | 53 #define SDR0_SRST0_DMC 0x00200000 macro
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| H A D | ppc460ex_gt.h | 138 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| H A D | ppc440epx_grx.h | 322 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/arch/powerpc/include/ibm4xx/ |
| H A D | dcr4xx.h | 253 #define SDR0_SRST0_DMC (1 << 21) /* DDR1/2 SDRAM memory controller */ macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/include/ |
| H A D | ppc440.h | 1465 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
1535 #define SDR0_SRST0_DMC 0x00200000 /* DDR SDRAM memory controller */ macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 440 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/ |
| H A D | 44x_spd_ddr2.c | 469 mtsdr(SDR0_SRST, SDR0_SRST0_DMC); in initdram()
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