| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | ebiu.h | 413 #define SDSRA 0x0002 /* SDRAM self refresh is active */ macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 357 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/cpu/ |
| H A D | initcode.c | 592 while (!(bfin_read_EBIU_SDSTAT() & SDSRA)) in program_clocks()
|
| /dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
| H A D | defBF532.h | 1452 #define SDSRA 0x00000002 /* SDRAM SDRAM self refresh is active */ macro
|
| H A D | defBF561.h | 1855 #define SDSRA 0x00000002 /* SDRAM SDRAM self refresh is active */ macro
|
| H A D | defBF51x_base.h | 1631 #define SDSRA 0x0002 /* SDRAM Self-Refresh Active */ macro
|
| H A D | defBF52x_base.h | 1578 #define SDSRA 0x0002 /* SDRAM Self-Refresh Active */ macro
|
| H A D | defBF534.h | 1855 #define SDSRA 0x0002 /* SDRAM Self-Refresh Active */ macro
|
| H A D | defBF539.h | 2614 #define SDSRA 0x00000002 /* SDRAM SDRAM self refresh is active */ macro
|