Home
last modified time | relevance | path

Searched refs:SG_CTRL_BASE (Results 1 – 6 of 6) sorted by relevance

/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-uniphier/
H A Dsg-regs.h14 #define SG_CTRL_BASE 0x5f800000 macro
18 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
21 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
57 #define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
58 #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
59 #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
62 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
65 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
68 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-uniphier/
H A Dsg-regs.h14 #define SG_CTRL_BASE 0x5f800000 macro
18 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
21 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
57 #define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
58 #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
59 #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
62 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
65 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
68 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-uniphier/
H A Dsg-regs.h14 #define SG_CTRL_BASE 0x5f800000 macro
18 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
21 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
57 #define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
58 #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
59 #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
62 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
65 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
68 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-uniphier/
H A Dsg-regs.h14 #define SG_CTRL_BASE 0x5f800000 macro
18 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
21 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
57 #define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
58 #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
59 #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
62 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
65 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
68 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-uniphier/
H A Dsg-regs.h14 #define SG_CTRL_BASE 0x5f800000 macro
18 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
21 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
57 #define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
58 #define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
59 #define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
62 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
65 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
68 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/mach-uniphier/include/mach/
H A Dsg-regs.h13 #define SG_CTRL_BASE 0x5f800000 macro
17 #define SG_REVISION (SG_CTRL_BASE | 0x0000)
26 #define SG_MEMCONF (SG_CTRL_BASE | 0x0400)
54 #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
74 #define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
77 #define SG_IECTRL (SG_CTRL_BASE | 0x1d00)