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Searched refs:SH7750_DAR_REGOFS (Results 1 – 9 of 9) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu/qemu-6.2.0/hw/sh4/
H A Dsh7750_regs.h1031 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n) * 16)) /* offset */ macro
1032 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1033 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu60/qemu-6.0.0/hw/sh4/
H A Dsh7750_regs.h1031 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1032 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1033 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu-utils/qemu-4.2.1/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu5/qemu-5.2.0/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/sh4/
H A Dsh7750_regs.h1031 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */
1032 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1033 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/sh4/
H A Dsh7750_regs.h1011 #define SH7750_DAR_REGOFS(n) (0xA00004 + ((n)*16)) /* offset */ macro
1012 #define SH7750_DAR(n) SH7750_P4_REG32(SH7750_DAR_REGOFS(n))
1013 #define SH7750_DAR_A7(n) SH7750_A7_REG32(SH7750_DAR_REGOFS(n))