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/dports/science/dakota/dakota-6.13.0-release-public.src-UI/packages/external/trilinos/cmake/
H A DTrilinosCreateClientTemplateHeaders.cmake25 # If set, then the files will not be written in the SIERRA/bjam directory
26 # for SIERRA to pick up. This option would be used for template code that
45 # NOTE: The SIERRA integration system no longer uses this functionality to
46 # install configured headers into a SIERRA/ directory. Therefore, I am
50 # "${${PROJECT_NAME}_SOURCE_DIR}/SIERRA/bjam/config_headers")
H A DCallbackDefineRepositoryPackaging.cmake31 ${Trilinos_SOURCE_EXCLUDE_DIR}/SIERRA/
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/catapult/telemetry/telemetry/internal/platform/
H A Dmac_platform_backend_unittest.py19 self.assertGreater(os_version.HIGHSIERRA, os_version.SIERRA)
20 self.assertGreater(os_version.SIERRA, os_version.ELCAPITAN)
H A Dmac_platform_backend.py70 return os_version_module.SIERRA
/dports/comms/hylafax/hylafax-6.0.7/config/
H A Dsierra31 # Configuration for modems based on SIERRA DATA/FAX CHIP SET
34 # CONFIG: CLASS2: *SIERRA*-*
/dports/math/py-statsmodels/statsmodels-0.13.1/statsmodels/datasets/star98/src/
H A Dstar98.dat54 1075275 FRESNO SIERRA UNIFIED 21.604680317593 .540540540540541 .2910602910…
73 1573742 KERN SIERRA SANDS UNIFIED 32.5987279988168 2.2334864565183 4.799619832…
150 2673668 MONO EASTERN SIERRA UNIFIED 45.933734939759 .310077519379845 .7751937984…
262 4670177 SIERRA SIERRA-PLUMAS JOINT UNIFIED 32.1016166281755 1.63316582914573 .628140703…
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/simultaneous_stmts/
H A Dtest119.ams35 -- SIERRA REGRESSION TESTING MODEL
49 -- we build SIERRA, the VHDL AMS simulator. The circuit consists of 3
H A Dtest182.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest108.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest101.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest173.ams35 -- SIERRA REGRESSION TESTING MODEL
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/regression_test/
H A Dtest119.ams35 -- SIERRA REGRESSION TESTING MODEL
48 -- we build SIERRA, the VHDL AMS simulator. The circuit consists of 3
H A Dtest182.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest101.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest108.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest126.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest122.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest124.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest141.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest166.ams35 -- SIERRA REGRESSION TESTING MODEL
H A Dtest174.ams35 -- SIERRA REGRESSION TESTING MODEL
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/catapult/telemetry/telemetry/core/
H A Dos_version.py41 SIERRA = OSVersion('sierra', 1012) variable
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/subtype_test/
H A Dtest117.ams35 -- SIERRA REGRESSION TESTING MODEL
/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/usb/
H A Dusbdevs472 vendor SIERRA 0x1199 Sierra Wireless
2913 product SIERRA EM5625 0x0017 EM5625
2914 product SIERRA MC5720_2 0x0018 MC5720
2916 product SIERRA MC5725 0x0020 MC5725
2925 product SIERRA MC8755_2 0x6802 MC8755
2926 product SIERRA MC8765 0x6803 MC8765
2927 product SIERRA MC8755 0x6804 MC8755
2929 product SIERRA MC8755_3 0x6813 MC8755 HSDPA
2930 product SIERRA MC8775_2 0x6815 MC8775
2932 product SIERRA MC8780 0x6832 MC8780
[all …]
/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-ams/ad-hoc/fromUC/break_stmt/
H A Dtest123.ams35 -- SIERRA REGRESSION TESTING MODEL

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