/dports/math/xlife++/xlifepp-sources-v2.0.1-2018-05-09/ext/LAPACKBLAS/SRC/ |
H A D | clar2v.f | 131 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 151 SII = AIMAG( SI ) 152 T1R = SIR*ZIR - SII*ZII 153 T1I = SIR*ZII + SII*ZIR 159 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 160 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 131 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 151 SII = DIMAG( SI ) 152 T1R = SIR*ZIR - SII*ZII 153 T1I = SIR*ZII + SII*ZIR 159 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 160 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/xlapack/lapack-3.10.0/SRC/ |
H A D | clar2v.f | 128 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = AIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 128 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = DIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/blas/lapack-3.10.0/SRC/ |
H A D | clar2v.f | 128 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = AIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 128 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = DIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/science/apbs/apbs-pdb2pqr-apbs-1.5-102-g500c1473/apbs/externals/fetk/punc/src/lapack/src_f77/ |
H A D | clar2v.f | 60 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, local 80 SII = AIMAG( SI ) 81 T1R = SIR*ZIR - SII*ZII 82 T1I = SIR*ZII + SII*ZIR 88 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 89 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 60 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 80 SII = DIMAG( SI ) 81 T1R = SIR*ZIR - SII*ZII 82 T1I = SIR*ZII + SII*ZIR 88 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 89 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/lapacke/lapack-3.10.0/SRC/ |
H A D | clar2v.f | 128 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = AIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 128 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = DIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/lapack/lapack-3.10.0/SRC/ |
H A D | clar2v.f | 128 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = AIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 128 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, local 148 SII = DIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/science/elmerfem/elmerfem-release-9.0/mathlibs/src/lapack/ |
H A D | clar2v.f | 60 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 80 SII = AIMAG( SI ) 81 T1R = SIR*ZIR - SII*ZII 82 T1I = SIR*ZII + SII*ZIR 88 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 89 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 60 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 80 SII = DIMAG( SI ) 81 T1R = SIR*ZIR - SII*ZII 82 T1I = SIR*ZII + SII*ZIR 88 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 89 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/openblas/OpenBLAS-0.3.18/lapack-netlib/SRC/ |
H A D | clar2v.f | 131 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, local 151 SII = AIMAG( SI ) 152 T1R = SIR*ZIR - SII*ZII 153 T1I = SIR*ZII + SII*ZIR 159 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 160 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 131 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 151 SII = DIMAG( SI ) 152 T1R = SIR*ZIR - SII*ZII 153 T1I = SIR*ZII + SII*ZIR 159 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 160 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/cblas/lapack-3.10.0/SRC/ |
H A D | clar2v.f | 128 REAL CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = AIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*REAL( T4 )+SII*AIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*REAL( T3 )-SII*AIMAG( T3 ) )
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H A D | zlar2v.f | 128 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 148 SII = DIMAG( SI ) 149 T1R = SIR*ZIR - SII*ZII 150 T1I = SIR*ZII + SII*ZIR 156 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 157 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/math/algae/algae-4.3.6/lapack/ |
H A D | zlar2v.f | 60 DOUBLE PRECISION CI, SII, SIR, T1I, T1R, T5, T6, XI, YI, ZII, 80 SII = DIMAG( SI ) 81 T1R = SIR*ZIR - SII*ZII 82 T1I = SIR*ZII + SII*ZIR 88 X( IX ) = CI*T5 + ( SIR*DBLE( T4 )+SII*DIMAG( T4 ) ) 89 Y( IX ) = CI*T6 - ( SIR*DBLE( T3 )-SII*DIMAG( T3 ) )
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 112 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument 123 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause() 138 const SIInstrInfo *SII = ST.getInstrInfo(); in runOnMachineFunction() local 152 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 168 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction() 170 Changed |= emitClause(CI, SII); in runOnMachineFunction() 189 Changed |= emitClause(CI, SII); in runOnMachineFunction()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 112 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument 123 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause() 138 const SIInstrInfo *SII = ST.getInstrInfo(); in runOnMachineFunction() local 152 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 168 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction() 170 Changed |= emitClause(CI, SII); in runOnMachineFunction() 189 Changed |= emitClause(CI, SII); in runOnMachineFunction()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 113 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument 124 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause() 139 const SIInstrInfo *SII = ST.getInstrInfo(); in runOnMachineFunction() local 153 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 169 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction() 171 Changed |= emitClause(CI, SII); in runOnMachineFunction() 190 Changed |= emitClause(CI, SII); in runOnMachineFunction()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 112 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument 123 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause() 138 const SIInstrInfo *SII = ST.getInstrInfo(); in runOnMachineFunction() local 152 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 168 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction() 170 Changed |= emitClause(CI, SII); in runOnMachineFunction() 189 Changed |= emitClause(CI, SII); in runOnMachineFunction()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
H A D | SIInsertHardClauses.cpp | 113 bool emitClause(const ClauseInfo &CI, const SIInstrInfo *SII) { in emitClause() argument 124 BuildMI(MBB, *CI.First, DebugLoc(), SII->get(AMDGPU::S_CLAUSE)) in emitClause() 139 const SIInstrInfo *SII = ST.getInstrInfo(); in runOnMachineFunction() local 153 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction() 169 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction() 171 Changed |= emitClause(CI, SII); in runOnMachineFunction() 190 Changed |= emitClause(CI, SII); in runOnMachineFunction()
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/dports/math/cmlib/cmlib-3.0_8/src/dnl2sn/ |
H A D | ddupd2.f | 14 INTEGER D0, I, JCN0, JCN1, JCNI, JTOL0, JTOLI, K, L, SII 67 SII = IV(S) - 1 69 SII = SII + I 72 IF (V(SII) .GT. ZERO) T = DMAX1(DSQRT(V(SII)), T)
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