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Searched refs:SIMD_VBIT (Results 1 – 16 of 16) sorted by relevance

/dports/devel/avr-gdb/gdb-7.3.1/sim/arm/
H A Diwmmxt.c64 #define SIMD_VBIT -4 macro
1320 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1333 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1370 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1383 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1420 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1433 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
3104 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3117 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3154 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
[all …]
/dports/devel/gdb761/gdb-7.6.1/sim/arm/
H A Diwmmxt.c63 #define SIMD_VBIT -4 macro
1319 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1332 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1369 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1382 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1419 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1432 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
3106 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3119 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3156 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Diwmmxt.c62 #define SIMD_VBIT -4 macro
1318 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1331 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1368 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1381 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1418 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1431 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
3102 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3115 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3152 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Diwmmxt.c62 #define SIMD_VBIT -4 macro
1318 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1331 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1368 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1381 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1418 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
1431 SIMD32_SET (psr, overflow, SIMD_VBIT, i); in WADD()
3102 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3115 SIMD8_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
3152 SIMD16_SET (psr, overflow, SIMD_VBIT, i); in WSUB()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/target-arm/
H A Diwmmxt_helper.c40 #define SIMD_VBIT -4 macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/
H A Diwmmxt_helper.c40 #define SIMD_VBIT -4 macro
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Diwmmxt_helper.c38 #define SIMD_VBIT -4 macro
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/
H A Diwmmxt_helper.c40 #define SIMD_VBIT -4 macro