| /dports/emulators/mess/mame-mame0226/src/devices/cpu/e132xs/ |
| H A D | e132xsdrc_ops.hxx | 152 UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
186 UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
192 UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
202 UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
221 UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
257 UML_STORE(block, (void *)m_core->local_regs, I1, I2, SIZE_DWORD, SCALE_x4); in generate_trap_exception_or_int()
260 UML_STORE(block, (void *)m_core->local_regs, I3, I4, SIZE_DWORD, SCALE_x4); in generate_trap_exception_or_int()
1456 UML_DSEXT(block, I0, I0, SIZE_DWORD); in generate_subs()
1457 UML_DSEXT(block, I1, I1, SIZE_DWORD); in generate_subs()
5058 UML_DSEXT(block, I0, I0, SIZE_DWORD); in generate_extend()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/e132xs/ |
| H A D | e132xsdrc_ops.hxx | 152 UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
186 UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
192 UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
202 UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
221 UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4); in generate_set_global_register()
257 UML_STORE(block, (void *)m_core->local_regs, I1, I2, SIZE_DWORD, SCALE_x4); in generate_trap_exception_or_int()
260 UML_STORE(block, (void *)m_core->local_regs, I3, I4, SIZE_DWORD, SCALE_x4); in generate_trap_exception_or_int()
1456 UML_DSEXT(block, I0, I0, SIZE_DWORD); in generate_subs()
1457 UML_DSEXT(block, I1, I1, SIZE_DWORD); in generate_subs()
5058 UML_DSEXT(block, I0, I0, SIZE_DWORD); in generate_extend()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/mips/ |
| H A D | mips3drc.cpp | 1160 UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword in generate_checksum_block()
1171 UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword in generate_checksum_block()
1530 UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0 in generate_opcode()
1540 UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0 in generate_opcode()
2116 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_special()
2117 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_special()
2402 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_idt()
2403 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_idt()
2413 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_idt()
2414 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_idt()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/mips/ |
| H A D | mips3drc.cpp | 1160 UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword in generate_checksum_block()
1171 UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword in generate_checksum_block()
1530 UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0 in generate_opcode()
1540 UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0 in generate_opcode()
2116 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_special()
2117 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_special()
2402 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_idt()
2403 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_idt()
2413 UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword in generate_idt()
2414 UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword in generate_idt()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/arm7/ |
| H A D | arm7drc.hxx | 1378 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1379 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1391 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1395 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1396 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1410 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1411 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1423 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1427 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1428 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/arm7/ |
| H A D | arm7drc.hxx | 1378 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1379 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1391 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1395 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1396 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1410 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1411 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1423 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
1427 UML_DSEXT(block, uml::I0, DRC_REG(rm), uml::SIZE_DWORD); in drcarm7ops_0123()
1428 UML_DSEXT(block, uml::I1, DRC_REG(rn), uml::SIZE_DWORD); in drcarm7ops_0123()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/mb86235/ |
| H A D | mb86235drc.cpp | 452 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
459 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
476 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
483 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
1210 UML_FSFRINT(block, F0, I1, SIZE_DWORD); in generate_alu()
1670 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO); in generate_xfer1()
1687 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO); in generate_xfer1()
1745 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO); in generate_xfer2()
1762 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO); in generate_xfer2()
1785 UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); in generate_xfer2()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/mb86235/ |
| H A D | mb86235drc.cpp | 452 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
459 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
476 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
483 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessors()
1210 UML_FSFRINT(block, F0, I1, SIZE_DWORD); in generate_alu()
1670 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO); in generate_xfer1()
1687 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO); in generate_xfer1()
1745 UML_READ(block, I1, I0, SIZE_DWORD, SPACE_IO); in generate_xfer2()
1762 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_IO); in generate_xfer2()
1785 UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); in generate_xfer2()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/sharc/ |
| H A D | sharcdrc.cpp | 326 UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessor()
330 UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessor()
3501 UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD); in generate_compute()
3502 UML_DSEXT(block, I1, REG(fym), SIZE_DWORD); in generate_compute()
3521 UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD); in generate_compute()
3522 UML_DSEXT(block, I1, REG(fym), SIZE_DWORD); in generate_compute()
3604 UML_FSFRINT(block, F2, REG(fxa), SIZE_DWORD); in generate_compute()
4596 UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); in generate_compute()
4597 UML_DSEXT(block, I1, REG(ry), SIZE_DWORD); in generate_compute()
4605 UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); in generate_compute()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/sharc/ |
| H A D | sharcdrc.cpp | 326 UML_READ(block, I0, I1, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessor()
330 UML_WRITE(block, I1, I0, SIZE_DWORD, SPACE_DATA); in static_generate_memory_accessor()
3501 UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD); in generate_compute()
3502 UML_DSEXT(block, I1, REG(fym), SIZE_DWORD); in generate_compute()
3521 UML_DSEXT(block, I0, REG(fxm), SIZE_DWORD); in generate_compute()
3522 UML_DSEXT(block, I1, REG(fym), SIZE_DWORD); in generate_compute()
3604 UML_FSFRINT(block, F2, REG(fxa), SIZE_DWORD); in generate_compute()
4596 UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); in generate_compute()
4597 UML_DSEXT(block, I1, REG(ry), SIZE_DWORD); in generate_compute()
4605 UML_DSEXT(block, I0, REG(rx), SIZE_DWORD); in generate_compute()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/dspp/ |
| H A D | dsppdrc.cpp | 535 …mem(&m_core->m_jmpdest), (void *)m_core->m_stack, mem(&m_core->m_stack_ptr), SIZE_DWORD, SCALE_x4); in generate_super_special()
589 …ock, (void *)m_core->m_stack, mem(&m_core->m_stack_ptr), mem(&m_core->m_pc), SIZE_DWORD, SCALE_x4); in generate_special_opcode()
941 …UML_LOAD(block, I0, (void *)&m_core->m_operands[0].value, mem(&m_core->m_opidx), SIZE_DWORD, SCALE… in generate_read_next_operand()
950 …UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_… in generate_read_next_operand()
973 …UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_… in generate_write_next_operand()
1287 …UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts… in generate_arithmetic_opcode()
1302 …UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts… in generate_arithmetic_opcode()
|
| /dports/emulators/mame/mame-mame0226/src/devices/cpu/dspp/ |
| H A D | dsppdrc.cpp | 535 …mem(&m_core->m_jmpdest), (void *)m_core->m_stack, mem(&m_core->m_stack_ptr), SIZE_DWORD, SCALE_x4); in generate_super_special()
589 …ock, (void *)m_core->m_stack, mem(&m_core->m_stack_ptr), mem(&m_core->m_pc), SIZE_DWORD, SCALE_x4); in generate_special_opcode()
941 …UML_LOAD(block, I0, (void *)&m_core->m_operands[0].value, mem(&m_core->m_opidx), SIZE_DWORD, SCALE… in generate_read_next_operand()
950 …UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_… in generate_read_next_operand()
973 …UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_… in generate_write_next_operand()
1287 …UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts… in generate_arithmetic_opcode()
1302 …UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts… in generate_arithmetic_opcode()
|
| /dports/security/clamav/clamav-0.104.2/libclamav/ |
| H A D | disasm.c | 76 SIZE_DWORD, enumerator
94 static const uint8_t regmap[SIZE_DWORD+1][ADDR_REG_GS+1] = {
1118 PUSHOP(0xc8, ADDR_REG_EAX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1119 PUSHOP(0xc9, ADDR_REG_ECX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1120 PUSHOP(0xca, ADDR_REG_EDX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1121 PUSHOP(0xcb, ADDR_REG_EBX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1122 PUSHOP(0xcc, ADDR_REG_ESP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1123 PUSHOP(0xcd, ADDR_REG_EBP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1124 PUSHOP(0xce, ADDR_REG_ESI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1125 PUSHOP(0xcf, ADDR_REG_EDI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
[all …]
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| /dports/security/clamav-lts/clamav-0.103.5/libclamav/ |
| H A D | disasm.c | 76 SIZE_DWORD, enumerator
94 static const uint8_t regmap[SIZE_DWORD+1][ADDR_REG_GS+1] = {
1118 PUSHOP(0xc8, ADDR_REG_EAX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1119 PUSHOP(0xc9, ADDR_REG_ECX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1120 PUSHOP(0xca, ADDR_REG_EDX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1121 PUSHOP(0xcb, ADDR_REG_EBX, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1122 PUSHOP(0xcc, ADDR_REG_ESP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1123 PUSHOP(0xcd, ADDR_REG_EBP, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1124 PUSHOP(0xce, ADDR_REG_ESI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
1125 PUSHOP(0xcf, ADDR_REG_EDI, SIZE_DWORD, ADDR_NOADDR, SIZE_NOSIZE, OP_BSWAP),
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/powerpc/ |
| H A D | ppcdrc.cpp | 1061 UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword in static_generate_memory_accessor()
1129 … UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1 in static_generate_memory_accessor()
1378 UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword in static_generate_memory_accessor()
1643 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1657 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1664 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1670 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
2281 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_opcode()
2299 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_opcode()
2962 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_instruction_1f()
[all …]
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/powerpc/ |
| H A D | ppcdrc.cpp | 1061 UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword in static_generate_memory_accessor()
1129 … UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1 in static_generate_memory_accessor()
1378 UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword in static_generate_memory_accessor()
1643 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1657 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1664 UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword in generate_checksum_block()
1670 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
2281 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_opcode()
2299 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_opcode()
2962 UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt fd,f0,dword in generate_instruction_1f()
[all …]
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/rsp/ |
| H A D | rspdrc.cpp | 658 …UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,d… in generate_checksum_block()
664 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
680 …UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base… in generate_checksum_block()
687 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
695 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
|
| /dports/emulators/mame/mame-mame0226/src/devices/cpu/rsp/ |
| H A D | rspdrc.cpp | 658 …UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,d… in generate_checksum_block()
664 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
680 …UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base… in generate_checksum_block()
687 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
695 UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword in generate_checksum_block()
|
| /dports/devel/intel-graphics-compiler/intel-graphics-compiler-igc-1.0.9636/IGC/Compiler/CISACodeGen/ |
| H A D | PixelShaderCodeGen.cpp | 83 if (setup[i]->GetSize() == SIZE_DWORD) in AllocatePixelPhasePayload()
85 subRegOffset = 3 * SIZE_DWORD; in AllocatePixelPhasePayload()
277 if (setup[i]->GetSize() == SIZE_DWORD) in AllocatePSPayload()
280 subRegOffset = 3 * SIZE_DWORD; in AllocatePSPayload()
294 offset += 4 * SIZE_DWORD; in AllocatePSPayload()
564 uint numLanes = getGRFSize() / SIZE_DWORD ; // single GRF in GetZWDelta()
924 …m_R1 = GetNewVariable(getGRFSize() / SIZE_DWORD, ISA_TYPE_D, EALIGN_GRF, false, numberInstance, "R… in PreCompile()
1128 m_R1 = GetNewAlias(m_PixelPhasePayload, ISA_TYPE_D, 0, getGRFSize() / SIZE_DWORD); in AddPrologue()
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| H A D | HullShaderCodeGen.cpp | 230 offset += SIZE_DWORD; in AllocateSinglePatchPayload()
310 …TCH_DISPATCH_MODE) ? ((uint16_t)vertexIndex * getGRFSize()) : ((uint16_t)vertexIndex * SIZE_DWORD), in GetURBInputHandle()
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/sh/ |
| H A D | sh4.cpp | 2824 UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword in static_generate_memory_accessor()
3716 UML_FDFRINT(block, FPD32(Rn & 14), uml::mem(&m_sh2_state->m_fpul), SIZE_DWORD); in generate_group_15_op1111_0x13_FLOAT()
3721 UML_FSFRINT(block, FPS32(Rn), uml::mem(&m_sh2_state->m_fpul), SIZE_DWORD); in generate_group_15_op1111_0x13_FLOAT()
3751 UML_FDFRINT(block, F1, I0, SIZE_DWORD); in generate_group_15_op1111_0x13_FNEG()
3758 UML_FSFRINT(block, F1, I0, SIZE_DWORD); in generate_group_15_op1111_0x13_FNEG()
3815 UML_STORE(block, m_sh2_state->m_fr, I0, 0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_FLDI0()
3827 UML_STORE(block, m_sh2_state->m_fr, I0, 0x3F800000, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_FLDI1()
3913 UML_LOAD(block, I1, m_sh2_state->m_fr, I0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
3914 UML_LOAD(block, I2, m_sh2_state->m_xf, I0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
3915 UML_STORE(block, m_sh2_state->m_xf, I0, I1, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
[all …]
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| H A D | sh2.cpp | 1101 …UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dwor… in static_generate_memory_accessor()
1119 … UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1 in static_generate_memory_accessor()
1142 UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write r0, r1, program_dword in static_generate_memory_accessor()
1159 UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword in static_generate_memory_accessor()
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/sh/ |
| H A D | sh4.cpp | 2824 UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword in static_generate_memory_accessor()
3716 UML_FDFRINT(block, FPD32(Rn & 14), uml::mem(&m_sh2_state->m_fpul), SIZE_DWORD); in generate_group_15_op1111_0x13_FLOAT()
3721 UML_FSFRINT(block, FPS32(Rn), uml::mem(&m_sh2_state->m_fpul), SIZE_DWORD); in generate_group_15_op1111_0x13_FLOAT()
3751 UML_FDFRINT(block, F1, I0, SIZE_DWORD); in generate_group_15_op1111_0x13_FNEG()
3758 UML_FSFRINT(block, F1, I0, SIZE_DWORD); in generate_group_15_op1111_0x13_FNEG()
3815 UML_STORE(block, m_sh2_state->m_fr, I0, 0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_FLDI0()
3827 UML_STORE(block, m_sh2_state->m_fr, I0, 0x3F800000, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_FLDI1()
3913 UML_LOAD(block, I1, m_sh2_state->m_fr, I0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
3914 UML_LOAD(block, I2, m_sh2_state->m_xf, I0, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
3915 UML_STORE(block, m_sh2_state->m_xf, I0, I1, SIZE_DWORD, SCALE_x4); in generate_group_15_op1111_0x13_op1111_0xf13_FRCHG()
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| /dports/emulators/mess/mame-mame0226/src/devices/cpu/ |
| H A D | drcbex64.cpp | 2005 else if (size == SIZE_DWORD) in op_load()
2020 else if (size == SIZE_DWORD) in op_load()
2071 else if (size == SIZE_DWORD) in op_loads()
2088 else if (size == SIZE_DWORD) in op_loads()
2157 else if (size == SIZE_DWORD) in op_store()
2198 else if (size == SIZE_DWORD) in op_store()
2562 else if (sizep.size() == SIZE_DWORD) in op_sext()
2571 else if (sizep.size() == SIZE_DWORD) in op_sext()
2587 else if (sizep.size() == SIZE_DWORD) in op_sext()
4209 if (sizep.size() == SIZE_DWORD) in op_ffrint()
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| /dports/emulators/mame/mame-mame0226/src/devices/cpu/ |
| H A D | drcbex64.cpp | 2005 else if (size == SIZE_DWORD) in op_load()
2020 else if (size == SIZE_DWORD) in op_load()
2071 else if (size == SIZE_DWORD) in op_loads()
2088 else if (size == SIZE_DWORD) in op_loads()
2157 else if (size == SIZE_DWORD) in op_store()
2198 else if (size == SIZE_DWORD) in op_store()
2562 else if (sizep.size() == SIZE_DWORD) in op_sext()
2571 else if (sizep.size() == SIZE_DWORD) in op_sext()
2587 else if (sizep.size() == SIZE_DWORD) in op_sext()
4209 if (sizep.size() == SIZE_DWORD) in op_ffrint()
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