/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/config/rs6000/ |
H A D | spe.md | 24 (SPEFSCR_REGNO 112)]) 189 (clobber (reg:SI SPEFSCR_REGNO))] 199 (clobber (reg:SI SPEFSCR_REGNO))] 209 (clobber (reg:SI SPEFSCR_REGNO))] 1048 (clobber (reg:SI SPEFSCR_REGNO)) 1060 (clobber (reg:SI SPEFSCR_REGNO)) 1071 (clobber (reg:SI SPEFSCR_REGNO)) 1093 (clobber (reg:SI SPEFSCR_REGNO)) 1105 (clobber (reg:SI SPEFSCR_REGNO)) 1158 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | rs6000.h | 921 #define SPEFSCR_REGNO 112 macro 1181 global_regs[SPEFSCR_REGNO] = 1; \ 1361 : (REGNO) == SPEFSCR_REGNO ? SPEFSCR_REGS \
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/config/rs6000/ |
H A D | spe.md | 24 (SPEFSCR_REGNO 112)]) 189 (clobber (reg:SI SPEFSCR_REGNO))] 199 (clobber (reg:SI SPEFSCR_REGNO))] 209 (clobber (reg:SI SPEFSCR_REGNO))] 1048 (clobber (reg:SI SPEFSCR_REGNO)) 1060 (clobber (reg:SI SPEFSCR_REGNO)) 1071 (clobber (reg:SI SPEFSCR_REGNO)) 1093 (clobber (reg:SI SPEFSCR_REGNO)) 1105 (clobber (reg:SI SPEFSCR_REGNO)) 1158 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | rs6000.h | 921 #define SPEFSCR_REGNO 112 macro 1181 global_regs[SPEFSCR_REGNO] = 1; \ 1361 : (REGNO) == SPEFSCR_REGNO ? SPEFSCR_REGS \
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/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/gcc/config/rs6000/ |
H A D | spe.md | 24 (SPEFSCR_REGNO 112) 234 (clobber (reg:SI SPEFSCR_REGNO))] 244 (clobber (reg:SI SPEFSCR_REGNO))] 254 (clobber (reg:SI SPEFSCR_REGNO))] 1093 (clobber (reg:SI SPEFSCR_REGNO)) 1105 (clobber (reg:SI SPEFSCR_REGNO)) 1116 (clobber (reg:SI SPEFSCR_REGNO)) 1138 (clobber (reg:SI SPEFSCR_REGNO)) 1150 (clobber (reg:SI SPEFSCR_REGNO)) 1203 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | darwin-fallback.c | 441 set_offset (SPEFSCR_REGNO, &float_vector_state->fpscr); in handle_syscall()
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1353 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1373 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1393 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1413 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/rs6000/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1192 (clobber (reg:SI SPEFSCR_REGNO)) 1204 (clobber (reg:SI SPEFSCR_REGNO)) 1215 (clobber (reg:SI SPEFSCR_REGNO)) 1237 (clobber (reg:SI SPEFSCR_REGNO)) 1249 (clobber (reg:SI SPEFSCR_REGNO)) 1302 (clobber (reg:SI SPEFSCR_REGNO)) 1314 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1145 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1165 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1185 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1205 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/rs6000/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1113 (clobber (reg:SI SPEFSCR_REGNO)) 1125 (clobber (reg:SI SPEFSCR_REGNO)) 1136 (clobber (reg:SI SPEFSCR_REGNO)) 1158 (clobber (reg:SI SPEFSCR_REGNO)) 1170 (clobber (reg:SI SPEFSCR_REGNO)) 1223 (clobber (reg:SI SPEFSCR_REGNO)) 1235 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1153 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1173 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1193 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1213 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1353 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1373 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1393 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1413 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/lang/gnat_util/gcc-6-20180516/gcc/config/rs6000/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1192 (clobber (reg:SI SPEFSCR_REGNO)) 1204 (clobber (reg:SI SPEFSCR_REGNO)) 1215 (clobber (reg:SI SPEFSCR_REGNO)) 1237 (clobber (reg:SI SPEFSCR_REGNO)) 1249 (clobber (reg:SI SPEFSCR_REGNO)) 1302 (clobber (reg:SI SPEFSCR_REGNO)) 1314 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1145 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1165 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1185 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1205 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/lang/gcc48/gcc-4.8.5/gcc/config/rs6000/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1113 (clobber (reg:SI SPEFSCR_REGNO)) 1125 (clobber (reg:SI SPEFSCR_REGNO)) 1136 (clobber (reg:SI SPEFSCR_REGNO)) 1158 (clobber (reg:SI SPEFSCR_REGNO)) 1170 (clobber (reg:SI SPEFSCR_REGNO)) 1223 (clobber (reg:SI SPEFSCR_REGNO)) 1235 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1153 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1173 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1193 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1213 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/rs6000/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1113 (clobber (reg:SI SPEFSCR_REGNO)) 1125 (clobber (reg:SI SPEFSCR_REGNO)) 1136 (clobber (reg:SI SPEFSCR_REGNO)) 1158 (clobber (reg:SI SPEFSCR_REGNO)) 1170 (clobber (reg:SI SPEFSCR_REGNO)) 1223 (clobber (reg:SI SPEFSCR_REGNO)) 1235 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1157 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1177 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1197 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1217 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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H A D | vector.md | 1353 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1373 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1393 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO)); 1413 XVECEXP (par, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, SPEFSCR_REGNO));
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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/dports/lang/gcc8/gcc-8.5.0/gcc/config/powerpcspe/ |
H A D | spe.md | 245 (clobber (reg:SI SPEFSCR_REGNO))] 255 (clobber (reg:SI SPEFSCR_REGNO))] 265 (clobber (reg:SI SPEFSCR_REGNO))] 1179 (clobber (reg:SI SPEFSCR_REGNO)) 1191 (clobber (reg:SI SPEFSCR_REGNO)) 1202 (clobber (reg:SI SPEFSCR_REGNO)) 1224 (clobber (reg:SI SPEFSCR_REGNO)) 1236 (clobber (reg:SI SPEFSCR_REGNO)) 1289 (clobber (reg:SI SPEFSCR_REGNO)) 1301 (clobber (reg:SI SPEFSCR_REGNO)) [all …]
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