Searched refs:SPI_CFG2_MSSI_0 (Results 1 – 3 of 3) sorted by relevance
184 #define LL_SPI_SS_IDLENESS_01CYCLE (SPI_CFG2_MSSI_0)186 #define LL_SPI_SS_IDLENESS_03CYCLE (SPI_CFG2_MSSI_0 | SPI_CFG2_MSSI_1)188 #define LL_SPI_SS_IDLENESS_05CYCLE (SPI_CFG2_MSSI_2 | SPI_CFG2_MSSI_0)190 …ne LL_SPI_SS_IDLENESS_07CYCLE (SPI_CFG2_MSSI_2 | SPI_CFG2_MSSI_1 | SPI_CFG2_MSSI_0)192 #define LL_SPI_SS_IDLENESS_09CYCLE (SPI_CFG2_MSSI_3 | SPI_CFG2_MSSI_0)194 …ne LL_SPI_SS_IDLENESS_11CYCLE (SPI_CFG2_MSSI_3 | SPI_CFG2_MSSI_1 | SPI_CFG2_MSSI_0)196 …ne LL_SPI_SS_IDLENESS_13CYCLE (SPI_CFG2_MSSI_3 | SPI_CFG2_MSSI_2 | SPI_CFG2_MSSI_0)198 …ESS_15CYCLE (SPI_CFG2_MSSI_3 | SPI_CFG2_MSSI_2 | SPI_CFG2_MSSI_1 | SPI_CFG2_MSSI_0)
18327 #define SPI_CFG2_MSSI_0 (0x1UL << SPI_CFG2_MSSI_Pos) /*!< 0x00000001 */ macro
18058 #define SPI_CFG2_MSSI_0 (0x1UL << SPI_CFG2_MSSI_Pos) /*!< 0x00000001 */ macro