Home
last modified time | relevance | path

Searched refs:SPI_CLK_0_781MHZ (Results 1 – 25 of 68) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/spi/
H A Dbcm63xx_spi.c48 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
122 { 781000, SPI_CLK_0_781MHZ },
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/spi/
H A Dbcm63xx_spi.c48 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
122 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/spi/
H A Dbcm63xx_spi.c48 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
122 { 781000, SPI_CLK_0_781MHZ },
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/spi/
H A Dbcm63xx_spi.c48 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
122 { 781000, SPI_CLK_0_781MHZ },
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_spi.c50 #define SPI_CLK_0_781MHZ (2 << SPI_CLK_SHIFT) macro
124 { 781000, SPI_CLK_0_781MHZ },

123