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Searched refs:SPI_CMD_REG (Results 1 – 25 of 71) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/spi/
H A Dspi-mt65xx.c28 #define SPI_CMD_REG 0x0018 macro
186 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
188 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
190 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
192 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
341 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
346 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
460 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
465 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
647 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/spi/
H A Dspi-mt65xx.c28 #define SPI_CMD_REG 0x0018 macro
186 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
188 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
190 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
192 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
341 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
346 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
460 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
465 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
647 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/spi/
H A Dspi-mt65xx.c28 #define SPI_CMD_REG 0x0018 macro
186 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
188 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
190 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
192 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
341 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
346 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_enable_transfer()
460 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
465 writel(cmd, mdata->base + SPI_CMD_REG); in mtk_spi_dma_transfer()
647 cmd = readl(mdata->base + SPI_CMD_REG); in mtk_spi_interrupt()
[all …]
/dports/comms/py-esptool/esptool-3.2/flasher_stub/
H A Dstub_write_flash.c92 WRITE_REG(SPI_CMD_REG, SPI_FLASH_RDSR); in spiflash_is_ready()
93 while(READ_REG(SPI_CMD_REG) != 0) in spiflash_is_ready()
103 WRITE_REG(SPI_CMD_REG, SPI_FLASH_WREN); in spi_write_enable()
104 while(READ_REG(SPI_CMD_REG) != 0) in spi_write_enable()
292 WRITE_REG(SPI_CMD_REG, command); in start_next_erase()
293 while(READ_REG(SPI_CMD_REG) != 0) { } in start_next_erase()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/scsi/mvsas/
H A Dmv_64xx.h129 #define SPI_CMD_REG 0xc4 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/scsi/mvsas/
H A Dmv_64xx.h129 #define SPI_CMD_REG 0xc4 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/scsi/mvsas/
H A Dmv_64xx.h129 #define SPI_CMD_REG 0xc4 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c39 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
274 writel_be(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c39 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
274 writel_be(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/spi/
H A Dbcm63xx_hsspi.c42 #define SPI_CMD_REG (0x080 + (0x40 * (HSSPI_PP)) + 0x00) macro
277 writel(val, priv->regs + SPI_CMD_REG); in bcm63xx_hsspi_xfer()

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