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Searched refs:STM32_DDR_SIZE (Results 1 – 25 of 183) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c124 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
127 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c124 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
127 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c124 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
127 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c124 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
127 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c124 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
127 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/stm32mp1/
H A Dstm32mp1_ram.c170 (u32)priv->info.base, (u32)STM32_DDR_SIZE); in stm32mp1_ddr_setup()
173 STM32_DDR_SIZE); in stm32mp1_ddr_setup()

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