| /dports/emulators/dosbox-staging/dosbox-staging-0.78.0/src/cpu/core_dynrec/ |
| H A D | risc_armv4le-thumb.h | 82 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
536 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
626 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
931 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
1081 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-iw.h | 85 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
686 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
784 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
1126 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
1273 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-niw.h | 82 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
683 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
781 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
1125 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
1275 cache_addw(SUB_REG(HOST_a1, HOST_a1, HOST_a2),pos+0); // sub a1, a1, a2 in gen_fill_function_ptr()
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| /dports/games/libretro-dosbox/dosbox-libretro-aa71b67/src/cpu/core_dynrec/ |
| H A D | risc_armv4le-thumb.h | 85 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
539 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
629 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
934 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
1084 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-iw.h | 85 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
686 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
784 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
1126 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
1273 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-niw.h | 85 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
686 cache_addw( SUB_REG(reg, reg, templo1) ); // sub reg, reg, templo1 in gen_add_imm()
784 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
1128 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
1278 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| /dports/emulators/dosbox/dosbox-0.74-3/src/cpu/core_dynrec/ |
| H A D | risc_armv4le-thumb.h | 87 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
448 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
737 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
887 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-iw.h | 87 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
593 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
919 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
1066 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| H A D | risc_armv4le-thumb-niw.h | 87 #define SUB_REG(dst, src1, src2) (0x1a00 + (dst) + ((src1) << 3) + ((src2) << 6) ) macro
593 cache_addw( SUB_REG(templo3, templo3, templo1) ); // sub templo3, templo3, templo1 in gen_sub_direct_word()
921 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
1071 *(Bit16u*)pos=SUB_REG(HOST_a1, HOST_a1, HOST_a2); // sub a1, a1, a2 in gen_fill_function_ptr()
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| /dports/security/py-ropper/Ropper-1.13.6/ropper/ |
| H A D | arch.py | 251 … gadget.Category.SUB_REG : (('^sub (?P<dst>...), (?P<src>...)$',),('mov','call','jmp')),
301 … gadget.Category.SUB_REG : (('^sub (?P<dst>...), (?P<src>...)$',),('mov','call','jmp')),
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| /dports/security/py-ropper/Ropper-1.13.6/ropper/ropchain/arch/ |
| H A D | ropchainx86_64.py | 408 … sub = self._find(Category.SUB_REG, reg=reg, badDst=badRegs, badSrc=badRegs, dontModify=dontModify)
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| H A D | ropchainx86.py | 413 … sub = self._find(Category.SUB_REG, reg=reg, badDst=badRegs, badSrc=badRegs, dontModify=dontModify)
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| /dports/emulators/aranym/aranym-1.1.0/src/uae_cpu/compiler/ |
| H A D | codegen_arm.h | 118 #define SUB_REG(Rm) ADR_SUB(ADR_REG(Rm)) macro
991 #define CC_LDR_rRr(cc,Rd,Rn,Rm) _LS1(cc,1,0,Rd,Rn,SUB_REG(Rm))
1023 #define CC_STR_rRr(cc,Rd,Rn,Rm) _LS1(cc,0,0,Rd,Rn,SUB_REG(Rm))
1055 #define CC_LDRB_rRr(cc,Rd,Rn,Rm) _LS1(cc,1,1,Rd,Rn,SUB_REG(Rm))
1087 #define CC_STRB_rRr(cc,Rd,Rn,Rm) _LS1(cc,0,1,Rd,Rn,SUB_REG(Rm))
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