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Searched refs:SchedModels (Results 1 – 25 of 115) sorted by relevance

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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anond5379e1f0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon9a07613e0111::SubtargetEmitter
281 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
452 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
990 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1078 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1372 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1402 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1559 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1848 if (SchedModels.hasItineraries()) { in run()
1919 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anonde3c64210111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon276440520111::SubtargetEmitter
281 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
452 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
990 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1078 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1372 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1402 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1559 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1848 if (SchedModels.hasItineraries()) { in run()
1919 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon8e232e940111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon7c26bccc0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anone367f4620111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon00c64f800111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
988 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1077 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1373 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1403 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1849 if (SchedModels.hasItineraries()) { in run()
1920 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon489dfe940111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
992 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1081 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1379 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1409 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1835 if (SchedModels.hasItineraries()) { in run()
1905 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1324 CodeGenSchedModels &SchedModels; member in __anone2b2726b0a11::PredTransitions
1391 SchedModels)) in hasAliasedVariants()
1404 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1409 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1584 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1654 [&SchedModels](ArrayRef<unsigned> WS) { in inferFromTransitions()
1659 [&SchedModels](ArrayRef<unsigned> RS) { in inferFromTransitions()
1675 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
2180 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
2188 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anonc638b26e0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
992 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1081 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1379 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1409 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1560 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1835 if (SchedModels.hasItineraries()) { in run()
1905 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1324 CodeGenSchedModels &SchedModels; member in __anonc77913050a11::PredTransitions
1391 SchedModels)) in hasAliasedVariants()
1404 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1409 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1584 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1654 [&SchedModels](ArrayRef<unsigned> WS) { in inferFromTransitions()
1659 [&SchedModels](ArrayRef<unsigned> RS) { in inferFromTransitions()
1675 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
2180 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
2188 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon8045ecac0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
991 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1079 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1377 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1407 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1558 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1830 if (SchedModels.hasItineraries()) { in run()
1900 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1318 CodeGenSchedModels &SchedModels; member in __anon7f88fd830a11::PredTransitions
1385 SchedModels)) in hasAliasedVariants()
1398 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1403 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1578 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1648 [&SchedModels](ArrayRef<unsigned> WS) { in inferFromTransitions()
1653 [&SchedModels](ArrayRef<unsigned> RS) { in inferFromTransitions()
1669 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
2174 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
2182 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon744d266c0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
991 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1080 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1378 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1408 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1559 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1834 if (SchedModels.hasItineraries()) { in run()
1904 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1326 CodeGenSchedModels &SchedModels; member in __anon8eafff430a11::PredTransitions
1393 SchedModels)) in hasAliasedVariants()
1406 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1411 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1586 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1656 [&SchedModels](ArrayRef<unsigned> WS) { in inferFromTransitions()
1661 [&SchedModels](ArrayRef<unsigned> RS) { in inferFromTransitions()
1677 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
2182 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
2190 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anon83e4da8f0111::SubtargetEmitter
279 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
450 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
991 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1080 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1378 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1408 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1559 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1834 if (SchedModels.hasItineraries()) { in run()
1904 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp73 CodeGenSchedModels &SchedModels; member in __anondba80c3f0111::SubtargetEmitter
282 SchedModels.getModelForProc(Processor).ModelName; in CPUKeyValues()
453 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
995 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1084 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1382 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1412 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1565 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1845 if (SchedModels.hasItineraries()) { in run()
1916 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1333 CodeGenSchedModels &SchedModels; member in __anon7a8bf6b60a11::PredTransitions
1401 SchedModels)) in hasAliasedVariants()
1410 CodeGenSchedModels &SchedModels) { in hasVariant() argument
1414 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1419 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1608 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1715 dumpTransition(SchedModels, FromSC, SCTrans); in inferFromTransitions()
1724 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
2228 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
2236 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp74 CodeGenSchedModels &SchedModels; member in __anon2e5a60aa0111::SubtargetEmitter
427 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
968 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1056 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1354 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1389 SchedModels.getModelForProc(Processor).ModelName; in EmitProcessorLookup()
1411 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1564 collectVariantClasses(SchedModels, VariantClasses, in emitSchedModelHelpersImpl()
1836 if (SchedModels.hasItineraries()) { in run()
1907 if (SchedModels.hasItineraries()) { in run()
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/utils/TableGen/
H A DSubtargetEmitter.cpp74 CodeGenSchedModels &SchedModels; member in __anondc6ed4a80111::SubtargetEmitter
424 ItinList.resize(SchedModels.numInstrSchedClasses()); in EmitStageAndOperandCycleData()
997 LLVM_DEBUG(SC.dump(&SchedModels)); in GenSchedClassTables()
1085 if (!SchedModels.hasReadOfWrite( in GenSchedClassTables()
1086 SchedModels.getSchedWrite(WriteID).TheDef)) { in GenSchedClassTables()
1384 << " " << (SchedModels.schedClassEnd() in EmitProcessorModels()
1420 SchedModels.getModelForProc(Processor).ModelName; in EmitProcessorLookup()
1443 if (SchedModels.hasItineraries()) { in EmitSchedModel()
1758 if (SchedModels.hasItineraries()) { in run()
1823 if (SchedModels.hasItineraries()) { in run()
[all …]
H A DCodeGenSchedule.cpp1053 CodeGenSchedModels &SchedModels; member in __anon0df6d5ff0711::PredTransitions
1120 SchedModels)) in hasAliasedVariants()
1133 if (hasAliasedVariants(SchedModels.getSchedWrite(WI), SchedModels)) in hasVariant()
1138 if (hasAliasedVariants(SchedModels.getSchedRead(RI), SchedModels)) in hasVariant()
1313 if (!hasAliasedVariants(SchedRW, SchedModels)) { in substituteVariantOperand()
1383 [&SchedModels](ArrayRef<unsigned> WS) { in inferFromTransitions()
1388 [&SchedModels](ArrayRef<unsigned> RS) { in inferFromTransitions()
1404 SchedModels.getSchedClass(FromClassIdx) in inferFromTransitions()
1909 SchedModels->getSchedWrite(Writes[i]).dump(); in dump()
1917 SchedModels->getSchedRead(Reads[i]).dump(); in dump()
[all …]
/dports/devel/py-keystone-engine/keystone-engine-0.9.1-3/src/llvm/lib/MC/
H A DMCSubtargetInfo.cpp72 ArrayRef<SubtargetInfoKV> SchedModels(ProcSchedModels, ProcDesc.size()); in getSchedModelForCPU() local
74 assert(std::is_sorted(SchedModels.begin(), SchedModels.end(), in getSchedModelForCPU()
82 std::lower_bound(SchedModels.begin(), SchedModels.end(), CPU); in getSchedModelForCPU()
84 if (Found == SchedModels.end() || StringRef(Found->Key) != CPU) { in getSchedModelForCPU()
/dports/devel/llvm80/llvm-8.0.1.src/lib/MC/
H A DMCSubtargetInfo.cpp89 ArrayRef<SubtargetInfoKV> SchedModels(ProcSchedModels, ProcDesc.size()); in getSchedModelForCPU() local
91 assert(std::is_sorted(SchedModels.begin(), SchedModels.end(), in getSchedModelForCPU()
99 std::lower_bound(SchedModels.begin(), SchedModels.end(), CPU); in getSchedModelForCPU()
100 if (Found == SchedModels.end() || StringRef(Found->Key) != CPU) { in getSchedModelForCPU()
/dports/devel/llvm70/llvm-7.0.1.src/lib/MC/
H A DMCSubtargetInfo.cpp89 ArrayRef<SubtargetInfoKV> SchedModels(ProcSchedModels, ProcDesc.size()); in getSchedModelForCPU() local
91 assert(std::is_sorted(SchedModels.begin(), SchedModels.end(), in getSchedModelForCPU()
99 std::lower_bound(SchedModels.begin(), SchedModels.end(), CPU); in getSchedModelForCPU()
100 if (Found == SchedModels.end() || StringRef(Found->Key) != CPU) { in getSchedModelForCPU()

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