Searched refs:Set_Literal_Origin (Results 1 – 9 of 9) sorted by relevance
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/ |
H A D | vhdl-evaluation.adb | 84 Set_Literal_Origin (Res, Origin); 98 Set_Literal_Origin (Res, Origin); 115 Set_Literal_Origin (Res, Origin); 128 Set_Literal_Origin (Res, Origin); 157 Set_Literal_Origin (Res, Origin); 177 Set_Literal_Origin (Res, Origin); 190 Set_Literal_Origin (Res, Origin); 242 Set_Literal_Origin (Res, Origin); 252 Set_Literal_Origin (Res, Null_Iir); 345 Set_Literal_Origin (Right, Null_Iir);
|
H A D | vhdl-std_package.adb | 848 Set_Literal_Origin (Lit, Lit1); 887 Set_Literal_Origin (Lit, Create_Std_Phys_Lit (1, Time_Fs_Unit));
|
H A D | vhdl-configuration.adb | 1208 Set_Literal_Origin (Res, Null_Iir);
|
H A D | vhdl-sem_types.adb | 482 Set_Literal_Origin (Val, Get_Physical_Literal (Unit));
|
H A D | vhdl-nodes.ads | 7560 procedure Set_Literal_Origin (Lit : Iir; Orig : Iir); subprogspec
|
H A D | vhdl-nodes.adb | 1959 procedure Set_Literal_Origin (Lit : Iir; Orig : Iir) is subprogram 1965 end Set_Literal_Origin;
|
H A D | vhdl-sem_expr.adb | 4119 Set_Literal_Origin (Res, Lit);
|
H A D | vhdl-nodes_meta.adb | 6467 Set_Literal_Origin (N, V);
|
/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/ |
H A D | nodes.py | 1847 Set_Literal_Origin = libghdl.vhdl__nodes__set_literal_origin variable
|