Searched refs:Set_Parent_Type (Results 1 – 11 of 11) sorted by relevance
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/ |
H A D | vhdl-sem_types.adb | 251 Set_Parent_Type (Ntype, Ndef); 306 Set_Parent_Type (Ntype, Ndef); 412 Set_Parent_Type (Sub_Type, Def); 1112 Set_Parent_Type (Def, Base_Type); 1533 Set_Parent_Type (Res, Def); 1571 Set_Parent_Type (Res, Get_Base_Type (Atype)); 1695 Set_Parent_Type (Def, Type_Mark); 1977 Set_Parent_Type (Res, Type_Mark); 2219 Set_Parent_Type (Res, Type_Mark); 2321 Set_Parent_Type (Res, Type_Mark); [all …]
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H A D | vhdl-std_package.adb | 282 Set_Parent_Type (Subtype_Definition, Type_Definition); 661 Set_Parent_Type (Universal_Real_Subtype_Definition, 778 Set_Parent_Type (Real_Subtype_Definition, Real_Type_Definition); 919 Set_Parent_Type (Time_Subtype_Definition, Time_Type_Definition); 954 Set_Parent_Type 1104 Set_Parent_Type (Natural_Subtype_Definition, Integer_Type_Definition); 1136 Set_Parent_Type (Positive_Subtype_Definition,
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H A D | vhdl-sem_assocs.adb | 956 Set_Parent_Type (Actual_Index, Base_Index); 1071 Set_Parent_Type (Ntype, Atype);
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H A D | vhdl-utils.adb | 1652 Set_Parent_Type (Res, Base_Type);
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H A D | vhdl-evaluation.adb | 395 Set_Parent_Type (Res, A_Type); 2384 Set_Parent_Type (Index_Type, Conv_Index_Type);
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H A D | vhdl-sem_names.adb | 826 Set_Parent_Type (Slice_Type, Get_Base_Type (Index_Type)); 839 Set_Parent_Type (Expr_Type, Prefix_Base_Type);
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H A D | vhdl-nodes.ads | 8153 procedure Set_Parent_Type (Decl : Iir; Base_Type : Iir); subprogspec
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H A D | vhdl-nodes.adb | 3829 procedure Set_Parent_Type (Decl : Iir; Base_Type : Iir) is subprogram 3835 end Set_Parent_Type;
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H A D | vhdl-sem_expr.adb | 3788 Set_Parent_Type (Info.Index_Subtype, Get_Base_Type (Index_Type));
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H A D | vhdl-nodes_meta.adb | 6633 Set_Parent_Type (N, V);
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/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/ |
H A D | nodes.py | 2192 Set_Parent_Type = libghdl.vhdl__nodes__set_parent_type variable
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