| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
268 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
271 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
288 ShiftVal = 12; in getAddSubImmOpValue()
290 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
528 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
529 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
534 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
555 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
556 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
275 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
295 ShiftVal = 12; in getAddSubImmOpValue()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
554 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
275 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
295 ShiftVal = 12; in getAddSubImmOpValue()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
554 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
275 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
295 ShiftVal = 12; in getAddSubImmOpValue()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
554 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
275 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
295 ShiftVal = 12; in getAddSubImmOpValue()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
554 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue() local
275 assert((ShiftVal == 0 || ShiftVal == 12) && in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
295 ShiftVal = 12; in getAddSubImmOpValue()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal); in getAddSubImmOpValue()
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd); in getImm8OptLsl() local
554 assert((ShiftVal == 0 || ShiftVal == 8) && in getImm8OptLsl()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getImm8OptLsl()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue() local
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!"); in getMoveVecShifterOpValue()
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 274 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm());
275 assert((ShiftVal == 0 || ShiftVal == 12) &&
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal));
295 ShiftVal = 12; in RelationFindReplTupleSeq()
297 return ShiftVal == 0 ? 0 : (1 << ShiftVal);
553 unsigned ShiftVal = AArch64_AM::getShiftValue(ShiftOpnd);
554 assert((ShiftVal == 0 || ShiftVal == 8) && in CheckCmdReplicaIdentity()
559 return (Immediate & 0xff) | (ShiftVal == 0 ? 0 : (1 << ShiftVal));
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm());
581 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!");
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 82 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
83 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 84 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
85 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 84 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
85 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 84 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
85 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 82 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
83 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 84 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
85 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
| H A D | RISCVMatInt.cpp | 84 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
85 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 82 for (unsigned ShiftVal = 0; ShiftVal < Size; ShiftVal += PlatRegSize) { in getIntMatCost() local
83 APInt Chunk = Val.ashr(ShiftVal).sextOrTrunc(PlatRegSize); in getIntMatCost()
|