| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2781 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSDIV_SREM() local
2782 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSDIV_SREM()
2783 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSDIV_SREM()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2781 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSDIV_SREM() local
2782 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSDIV_SREM()
2783 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSDIV_SREM()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3019 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSDIV_SREM() local
3020 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSDIV_SREM()
3021 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSDIV_SREM()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3129 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3130 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3129 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3130 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3014 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSDIV_SREM() local
3015 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSDIV_SREM()
3016 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSDIV_SREM()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3129 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3130 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3197 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3198 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3199 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3129 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3130 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3014 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSDIV_SREM() local
3015 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSDIV_SREM()
3016 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSDIV_SREM()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM() local
3129 auto LHSign = B.buildAShr(Ty, LHS, SignBitOffset); in legalizeSignedDIV_REM()
3130 auto RHSign = B.buildAShr(Ty, RHS, SignBitOffset); in legalizeSignedDIV_REM()
|