| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/tcg/sparc/ |
| H A D | tcg-target.h | 54 TCG_REG_L1, enumerator
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| H A D | tcg-target.c | 64 TCG_REG_L1,
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| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/i386/ |
| H A D | tcg-target.c | 113 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
116 # define TCG_REG_L1 TCG_REG_EDX macro
251 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1287 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
1664 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc); in tcg_out_qemu_ld()
1684 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE); in tcg_out_qemu_ld()
1685 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); in tcg_out_qemu_ld()
1686 base = TCG_REG_L1; in tcg_out_qemu_ld()
1815 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE); in tcg_out_qemu_st()
1816 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); in tcg_out_qemu_st()
[all …]
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| /dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/i386/ |
| H A D | tcg-target.c | 113 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
116 # define TCG_REG_L1 TCG_REG_EDX macro
251 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1287 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
1664 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc); in tcg_out_qemu_ld()
1684 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE); in tcg_out_qemu_ld()
1685 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); in tcg_out_qemu_ld()
1686 base = TCG_REG_L1; in tcg_out_qemu_ld()
1815 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, GUEST_BASE); in tcg_out_qemu_st()
1816 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); in tcg_out_qemu_st()
[all …]
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/sparc/ |
| H A D | tcg-target.h | 53 TCG_REG_L1, enumerator
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| /dports/emulators/qemu/qemu-6.2.0/tcg/sparc/ |
| H A D | tcg-target.h | 53 TCG_REG_L1, enumerator
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| /dports/emulators/qemu60/qemu-6.0.0/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
| H A D | tcg-target.h | 50 TCG_REG_L1, enumerator
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| H A D | tcg-target.c | 94 TCG_REG_L1,
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| /dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
| H A D | tcg-target.h | 50 TCG_REG_L1, enumerator
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| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu5/qemu-5.2.0/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu42/qemu-4.2.1/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/sparc/ |
| H A D | tcg-target.h | 52 TCG_REG_L1, enumerator
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/i386/ |
| H A D | tcg-target.inc.c | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
132 # define TCG_REG_L1 TCG_REG_EDX macro
263 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1611 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
2040 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base); in tcg_out_qemu_ld()
2041 index = TCG_REG_L1; in tcg_out_qemu_ld()
2152 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc); in tcg_out_qemu_st()
2179 tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base); in tcg_out_qemu_st()
2180 base = TCG_REG_L1; in tcg_out_qemu_st()
2183 tcg_out_ext32u(s, TCG_REG_L1, base); in tcg_out_qemu_st()
[all …]
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/i386/ |
| H A D | tcg-target.inc.c | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
132 # define TCG_REG_L1 TCG_REG_EDX macro
264 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1704 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
2126 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); in tcg_out_qemu_ld()
2244 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); in tcg_out_qemu_st()
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| /dports/emulators/qemu-utils/qemu-4.2.1/tcg/i386/ |
| H A D | tcg-target.inc.c | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
132 # define TCG_REG_L1 TCG_REG_EDX macro
264 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1704 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
2126 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); in tcg_out_qemu_ld()
2244 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); in tcg_out_qemu_st()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/i386/ |
| H A D | tcg-target.inc.c | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
132 # define TCG_REG_L1 TCG_REG_EDX macro
264 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1704 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
2126 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); in tcg_out_qemu_ld()
2244 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); in tcg_out_qemu_st()
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| /dports/emulators/qemu42/qemu-4.2.1/tcg/i386/ |
| H A D | tcg-target.inc.c | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1] macro
132 # define TCG_REG_L1 TCG_REG_EDX macro
264 tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1); in target_parse_constraint()
1704 const TCGReg r1 = TCG_REG_L1; in tcg_out_tlb_load()
2126 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc); in tcg_out_qemu_ld()
2244 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc); in tcg_out_qemu_st()
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| /dports/emulators/qemu5/qemu-5.2.0/tcg/i386/ |
| H A D | tcg-target.c.inc | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1]
132 # define TCG_REG_L1 TCG_REG_EDX
253 tcg_regset_reset_reg(ct->regs, TCG_REG_L1);
1693 const TCGReg r1 = TCG_REG_L1;
2115 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
2233 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/i386/ |
| H A D | tcg-target.c.inc | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1]
132 # define TCG_REG_L1 TCG_REG_EDX
146 # define SOFTMMU_RESERVE_REGS ((1 << TCG_REG_L0) | (1 << TCG_REG_L1))
1663 const TCGReg r1 = TCG_REG_L1;
2078 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
2167 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
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| /dports/emulators/qemu/qemu-6.2.0/tcg/i386/ |
| H A D | tcg-target.c.inc | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1]
132 # define TCG_REG_L1 TCG_REG_EDX
146 # define SOFTMMU_RESERVE_REGS ((1 << TCG_REG_L0) | (1 << TCG_REG_L1))
1663 const TCGReg r1 = TCG_REG_L1;
2078 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
2167 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
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| /dports/emulators/qemu60/qemu-6.0.0/tcg/i386/ |
| H A D | tcg-target.c.inc | 129 # define TCG_REG_L1 tcg_target_call_iarg_regs[1]
132 # define TCG_REG_L1 TCG_REG_EDX
146 # define SOFTMMU_RESERVE_REGS ((1 << TCG_REG_L0) | (1 << TCG_REG_L1))
1664 const TCGReg r1 = TCG_REG_L1;
2079 tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
2168 tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
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