/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/sparc/ |
H A D | tcg-target.inc.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 601 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 745 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 819 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 835 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1127 tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_T1, in tcg_out_tlb_load() 1271 addr = TCG_REG_T1; in tcg_out_qemu_ld() 1326 addr = TCG_REG_T1; in tcg_out_qemu_st() 1376 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); in tcg_out_op() 1891 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) in tb_target_set_jmp_target() [all …]
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/sparc/ |
H A D | tcg-target.inc.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 574 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 714 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 788 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 804 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1238 addr = TCG_REG_T1; in tcg_out_qemu_ld() 1293 addr = TCG_REG_T1; in tcg_out_qemu_st() 1342 tcg_out_sethi(s, TCG_REG_T1, 0); in tcg_out_op() 1343 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); in tcg_out_op() 1858 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) in tb_target_set_jmp_target() [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/sparc/ |
H A D | tcg-target.inc.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 574 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 714 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 788 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 804 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1238 addr = TCG_REG_T1; in tcg_out_qemu_ld() 1293 addr = TCG_REG_T1; in tcg_out_qemu_st() 1342 tcg_out_sethi(s, TCG_REG_T1, 0); in tcg_out_op() 1343 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); in tcg_out_op() 1858 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) in tb_target_set_jmp_target() [all …]
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/dports/emulators/qemu42/qemu-4.2.1/tcg/sparc/ |
H A D | tcg-target.inc.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 574 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 714 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 788 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 804 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1238 addr = TCG_REG_T1; in tcg_out_qemu_ld() 1293 addr = TCG_REG_T1; in tcg_out_qemu_st() 1342 tcg_out_sethi(s, TCG_REG_T1, 0); in tcg_out_op() 1343 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); in tcg_out_op() 1858 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) in tb_target_set_jmp_target() [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/sparc/ |
H A D | tcg-target.inc.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 574 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 714 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 788 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 804 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1238 addr = TCG_REG_T1; in tcg_out_qemu_ld() 1293 addr = TCG_REG_T1; in tcg_out_qemu_st() 1342 tcg_out_sethi(s, TCG_REG_T1, 0); in tcg_out_op() 1343 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); in tcg_out_op() 1858 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) in tb_target_set_jmp_target() [all …]
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
H A D | tcg-target.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 492 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, offset); in tcg_out_ldst() 493 tcg_out_ldst_rr(s, ret, addr, TCG_REG_T1, op); in tcg_out_ldst() 533 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 679 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 753 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 769 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1004 tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_T1, in tcg_out_tlb_load() 1011 tcg_out_arith(s, r0, addr, TCG_REG_T1, ARITH_AND); in tcg_out_tlb_load() 1146 addr = TCG_REG_T1; in tcg_out_qemu_ld() [all …]
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/sparc/ |
H A D | tcg-target.c | 83 #define TCG_REG_T1 TCG_REG_G1 macro 492 tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_T1, offset); in tcg_out_ldst() 493 tcg_out_ldst_rr(s, ret, addr, TCG_REG_T1, op); in tcg_out_ldst() 533 tcg_out_sety(s, TCG_REG_T1); in tcg_out_div32() 679 c2 = TCG_REG_T1; in tcg_out_setcond_i32() 753 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i32() 769 TCGReg tmp = TCG_REG_T1; in tcg_out_addsub2_i64() 1004 tcg_out_movi(s, TCG_TYPE_TL, TCG_REG_T1, in tcg_out_tlb_load() 1011 tcg_out_arith(s, r0, addr, TCG_REG_T1, ARITH_AND); in tcg_out_tlb_load() 1146 addr = TCG_REG_T1; in tcg_out_qemu_ld() [all …]
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/sparc/ |
H A D | tcg-target.c.inc | 103 #define TCG_REG_T1 TCG_REG_G1 561 tcg_out_sety(s, TCG_REG_T1); 696 c2 = TCG_REG_T1; 770 TCGReg tmp = TCG_REG_T1; 786 TCGReg tmp = TCG_REG_T1; 1224 addr = TCG_REG_T1; 1279 addr = TCG_REG_T1; 1328 tcg_out_sethi(s, TCG_REG_T1, 0); 1329 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); 1815 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) [all …]
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/dports/emulators/qemu/qemu-6.2.0/tcg/sparc/ |
H A D | tcg-target.c.inc | 103 #define TCG_REG_T1 TCG_REG_G1 561 tcg_out_sety(s, TCG_REG_T1); 696 c2 = TCG_REG_T1; 770 TCGReg tmp = TCG_REG_T1; 786 TCGReg tmp = TCG_REG_T1; 1224 addr = TCG_REG_T1; 1279 addr = TCG_REG_T1; 1328 tcg_out_sethi(s, TCG_REG_T1, 0); 1329 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); 1815 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) [all …]
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/dports/emulators/qemu60/qemu-6.0.0/tcg/sparc/ |
H A D | tcg-target.c.inc | 103 #define TCG_REG_T1 TCG_REG_G1 551 tcg_out_sety(s, TCG_REG_T1); 691 c2 = TCG_REG_T1; 765 TCGReg tmp = TCG_REG_T1; 781 TCGReg tmp = TCG_REG_T1; 1215 addr = TCG_REG_T1; 1270 addr = TCG_REG_T1; 1319 tcg_out_sethi(s, TCG_REG_T1, 0); 1320 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); 1804 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) [all …]
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/dports/emulators/qemu5/qemu-5.2.0/tcg/sparc/ |
H A D | tcg-target.c.inc | 83 #define TCG_REG_T1 TCG_REG_G1 569 tcg_out_sety(s, TCG_REG_T1); 709 c2 = TCG_REG_T1; 783 TCGReg tmp = TCG_REG_T1; 799 TCGReg tmp = TCG_REG_T1; 1233 addr = TCG_REG_T1; 1288 addr = TCG_REG_T1; 1337 tcg_out_sethi(s, TCG_REG_T1, 0); 1338 tcg_out_arithi(s, TCG_REG_T1, TCG_REG_T1, 0, ARITH_OR); 1854 i2 = (ARITH_OR | INSN_RD(TCG_REG_T1) | INSN_RS1(TCG_REG_T1) [all …]
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/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/tcg/mips/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.h | 42 TCG_REG_T1, enumerator
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.h | 42 TCG_REG_T1,
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/dports/emulators/qemu60/qemu-6.0.0/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu5/qemu-5.2.0/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/ |
H A D | tcg-target.h | 45 TCG_REG_T1, enumerator
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/riscv/ |
H A D | tcg-target.h | 46 TCG_REG_T1, enumerator
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/dports/emulators/qemu/qemu-6.2.0/tcg/riscv/ |
H A D | tcg-target.h | 46 TCG_REG_T1, enumerator
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/ |
H A D | tcg-target.h | 54 TCG_REG_T1, enumerator
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/dports/emulators/qemu/qemu-6.2.0/tcg/mips/ |
H A D | tcg-target.h | 54 TCG_REG_T1, enumerator
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/dports/emulators/qemu60/qemu-6.0.0/tcg/mips/ |
H A D | tcg-target.h | 52 TCG_REG_T1, enumerator
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