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Searched refs:TEGRA_RST_DEVICES_V (Results 1 – 10 of 10) sorted by relevance

/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h150 #define TEGRA_RST_DEVICES_V U(0x358) macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h150 #define TEGRA_RST_DEVICES_V U(0x358) macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h150 #define TEGRA_RST_DEVICES_V U(0x358) macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h150 #define TEGRA_RST_DEVICES_V U(0x358) macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h150 #define TEGRA_RST_DEVICES_V U(0x358) macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c943 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V); in tegra_se_enable_clocks()
945 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V, val); in tegra_se_enable_clocks()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c943 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V); in tegra_se_enable_clocks()
945 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V, val); in tegra_se_enable_clocks()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c943 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V); in tegra_se_enable_clocks()
945 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V, val); in tegra_se_enable_clocks()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c943 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V); in tegra_se_enable_clocks()
945 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V, val); in tegra_se_enable_clocks()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c943 val = mmio_read_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V); in tegra_se_enable_clocks()
945 mmio_write_32(TEGRA_CAR_RESET_BASE + TEGRA_RST_DEVICES_V, val); in tegra_se_enable_clocks()