| /dports/games/tycho/species/ |
| H A D | randomc.h | 135 TEMU = 11, TEMS = 7, TEMT = 15, TEML = 17}; enumerator
144 TEMU = 11, TEMS = 7, TEMT = 15, TEML = 18};
|
| H A D | mersenne.cpp | 48 y ^= (y << TEMT) & TEMC; in BRandom()
|
| /dports/games/species/species/ |
| H A D | randomc.h | 135 TEMU = 11, TEMS = 7, TEMT = 15, TEML = 17}; enumerator
144 TEMU = 11, TEMS = 7, TEMT = 15, TEML = 18};
|
| H A D | mersenne.cpp | 48 y ^= (y << TEMT) & TEMC; in BRandom()
|
| /dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/ |
| H A D | dv-bfin_uart.h | 41 #define TEMT (1 << 6) macro
|
| H A D | dv-bfin_uart.c | 238 lsr |= TEMT | THRE | (uart->saved_count > 0 ? DR : 0); in bfin_uart_get_status()
242 (status & DV_SOCKSER_OUTPUT_EMPTY ? TEMT | THRE : 0); in bfin_uart_get_status()
|
| /dports/devel/gdb761/gdb-7.6.1/sim/bfin/ |
| H A D | dv-bfin_uart.h | 38 #define TEMT (1 << 6) macro
|
| H A D | dv-bfin_uart.c | 252 lsr |= TEMT | THRE | (uart->saved_count > 0 ? DR : 0); in bfin_uart_get_status()
256 (status & DV_SOCKSER_OUTPUT_EMPTY ? TEMT | THRE : 0); in bfin_uart_get_status()
|
| H A D | dv-bfin_uart2.c | 154 uart->lsr &= ~(DR | THRE | TEMT); in bfin_uart_io_read_buffer()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart4.h | 45 #define TEMT (1 << 7) macro
|
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/ |
| H A D | uart.h | 56 #define TEMT 0x40 /* TSR and UART_THR Empty */ macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/serial/ |
| H A D | serial_bfin.c | 163 while (!(uart_lsr_read(uart_base) & TEMT)) in LOOP()
183 while (!(uart_lsr_read(uart_base) & TEMT))
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/cpu/ |
| H A D | initcode.c | 100 while (!(bfin_read16(&pUART->lsr) & TEMT)) in serial_putc()
|