Searched refs:TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ (Results 1 – 22 of 22) sorted by relevance
2116 #define TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ 0x80000000 macro
1957 val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ); in tg3_reset_hw()
2103 #define TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ 0x80000000 macro
2076 #define TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ 0x80000000 macro
9954 val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ); in tg3_reset_hw()