| /dports/lang/rust/rustc-1.58.1-src/src/doc/embedded-book/src/design-patterns/hal/ |
| H A D | interoperability.md | 22 # pub struct TIMER0;
23 pub struct Timer(TIMER0);
26 pub fn new(periph: TIMER0) -> Self {
30 pub fn free(self) -> TIMER0 {
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pinctrl/ |
| H A D | pinctrl-lpc18xx.c | 252 LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
253 LPC_P(1,13, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
254 LPC_P(1,14, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, R, 0, ND);
255 LPC_P(1,15, GPIO, UART2, SGPIO, ENET, TIMER0, R, R, R, 0, ND);
256 LPC_P(1,16, GPIO, UART2, SGPIO,ENET_ALT,TIMER0, R, R, ENET, 0, ND);
257 LPC_P(1,17, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, HD);
258 LPC_P(1,18, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, ND);
260 LPC_P(1,20, GPIO, SSP1, R, ENET, TIMER0, R, SGPIO, R, 0, ND);
324 LPC_P(8,0, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
325 LPC_P(8,1, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
[all …]
|
| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/pinctrl/ |
| H A D | pinctrl-lpc18xx.c | 252 LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
253 LPC_P(1,13, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
254 LPC_P(1,14, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, R, 0, ND);
255 LPC_P(1,15, GPIO, UART2, SGPIO, ENET, TIMER0, R, R, R, 0, ND);
256 LPC_P(1,16, GPIO, UART2, SGPIO,ENET_ALT,TIMER0, R, R, ENET, 0, ND);
257 LPC_P(1,17, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, HD);
258 LPC_P(1,18, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, ND);
260 LPC_P(1,20, GPIO, SSP1, R, ENET, TIMER0, R, SGPIO, R, 0, ND);
324 LPC_P(8,0, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
325 LPC_P(8,1, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
[all …]
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pinctrl/ |
| H A D | pinctrl-lpc18xx.c | 252 LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
253 LPC_P(1,13, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
254 LPC_P(1,14, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, R, 0, ND);
255 LPC_P(1,15, GPIO, UART2, SGPIO, ENET, TIMER0, R, R, R, 0, ND);
256 LPC_P(1,16, GPIO, UART2, SGPIO,ENET_ALT,TIMER0, R, R, ENET, 0, ND);
257 LPC_P(1,17, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, HD);
258 LPC_P(1,18, GPIO, UART2, R, ENET, TIMER0, CAN1, SGPIO, R, 0, ND);
260 LPC_P(1,20, GPIO, SSP1, R, ENET, TIMER0, R, SGPIO, R, 0, ND);
324 LPC_P(8,0, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
325 LPC_P(8,1, GPIO, USB0, R, MCTRL, SGPIO, R, R, TIMER0, 0, HD);
[all …]
|
| /dports/emulators/qemu/qemu-6.2.0/hw/avr/ |
| H A D | atmega.c | 29 TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, enumerator
35 #define TIMER(n) (n + TIMER0)
73 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
93 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
|
| /dports/emulators/qemu60/qemu-6.0.0/hw/avr/ |
| H A D | atmega.c | 30 TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, enumerator
36 #define TIMER(n) (n + TIMER0)
74 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
94 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
|
| /dports/emulators/qemu5/qemu-5.2.0/hw/avr/ |
| H A D | atmega.c | 30 TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, enumerator
36 #define TIMER(n) (n + TIMER0)
74 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
94 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
|
| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/avr/ |
| H A D | atmega.c | 29 TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, TIMER5, enumerator
35 #define TIMER(n) (n + TIMER0)
73 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
93 [TIMER0] = { 0x44, POWER0, 5, 0x6e, 0x35, false },
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arc/boot/dts/ |
| H A D | skeleton.dtsi | 30 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs.dtsi | 25 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs_idu.dtsi | 43 /* TIMER0 with interrupt for clockevent */
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arc/boot/dts/ |
| H A D | skeleton.dtsi | 30 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs.dtsi | 25 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs_idu.dtsi | 43 /* TIMER0 with interrupt for clockevent */
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arc/boot/dts/ |
| H A D | skeleton.dtsi | 30 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs.dtsi | 25 /* TIMER0 with interrupt for clockevent */
|
| H A D | skeleton_hs_idu.dtsi | 43 /* TIMER0 with interrupt for clockevent */
|
| /dports/devel/tinygo/tinygo-0.14.1/lib/CMSIS/CMSIS/SVD/ |
| H A D | ARM_Example.h | 177 #define TIMER0 ((TIMER0_Type *) TIMER0_BASE) macro
|
| /dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/pca10001/greenblink/iar/ |
| H A D | startup.s | 88 DCD 0 ; TIMER0
|
| /dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/pca10001/greenblink/keil/ |
| H A D | startup.s | 96 DCD 0 ; TIMER0
|
| /dports/devel/qbs/qbs-src-1.21.0/examples/baremetal/pca10040/greenblink/iar/ |
| H A D | startup.s | 88 DCD 0 ; TIMER0.
|
| /dports/lang/python-legacy/Python-2.7.18/Lib/plat-irix5/ |
| H A D | DEVICE.py | 374 TIMER0 = 515 variable
|
| /dports/lang/python-legacy/Python-2.7.18/Lib/plat-irix6/ |
| H A D | DEVICE.py | 374 TIMER0 = 515 variable
|
| /dports/lang/python27/Python-2.7.18/Lib/plat-irix5/ |
| H A D | DEVICE.py | 374 TIMER0 = 515 variable
|
| /dports/lang/python27/Python-2.7.18/Lib/plat-irix6/ |
| H A D | DEVICE.py | 374 TIMER0 = 515 variable
|