/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-gx6605s.c | 16 #define TIMER_DIV 0x24 macro 105 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clkevt_init() 114 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clksrc_init()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-gx6605s.c | 16 #define TIMER_DIV 0x24 macro 105 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clkevt_init() 114 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clksrc_init()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-gx6605s.c | 16 #define TIMER_DIV 0x24 macro 105 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clkevt_init() 114 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clksrc_init()
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/dports/misc/rump/buildrump.sh-b914579/src/sys/dev/ic/ |
H A D | attimer.c | 125 TIMER_DIV(pitch) % 256); in attimer_set_pitch() 127 TIMER_DIV(pitch) / 256); in attimer_set_pitch()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 15 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 51 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 15 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 51 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 19 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 55 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv7/sunxi/ |
H A D | timer.c | 15 #define TIMER_DIV (0x0 << 4) /* pre scale 1 */ macro 51 writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN, in timer_init()
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