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Searched refs:TIMER_INT (Results 1 – 25 of 32) sorted by relevance

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/dports/audio/nosefart/nosefart-1.92f-mls/src/msdos/
H A Ddostimer.c57 _go32_dpmi_get_protected_mode_interrupt_vector(TIMER_INT, &old_handler);
60 _go32_dpmi_chain_protected_mode_interrupt_vector(TIMER_INT, &new_handler);
73 _go32_dpmi_set_protected_mode_interrupt_vector(TIMER_INT, &old_handler);
H A Ddostimer.h29 #define TIMER_INT 0x08 macro
/dports/devel/allegro/allegro-4.4.3.1/src/dos/
H A Ddtimer.c36 #define TIMER_INT 8 macro
190 if (_install_irq(TIMER_INT, fixed_timer_handler) != 0) in fixed_timer_init()
215 _remove_irq(TIMER_INT); in fixed_timer_exit()
448 if (_install_irq(TIMER_INT, var_timer_handler) != 0) in var_timer_init()
501 _remove_irq(TIMER_INT); in var_timer_exit()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-sprd.c23 #define TIMER_INT 0x14 macro
68 writel_relaxed(TIMER_INT_EN, base + TIMER_INT); in sprd_timer_enable_interrupt()
73 u32 val = readl_relaxed(base + TIMER_INT); in sprd_timer_clear_interrupt()
76 writel_relaxed(val, base + TIMER_INT); in sprd_timer_clear_interrupt()
H A Dmps2-timer.c29 #define TIMER_INT 0xc macro
84 u32 status = readl_relaxed(ce->reg + TIMER_INT); in mps2_timer_interrupt()
91 writel_relaxed(1, ce->reg + TIMER_INT); in mps2_timer_interrupt()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-sprd.c23 #define TIMER_INT 0x14 macro
68 writel_relaxed(TIMER_INT_EN, base + TIMER_INT); in sprd_timer_enable_interrupt()
73 u32 val = readl_relaxed(base + TIMER_INT); in sprd_timer_clear_interrupt()
76 writel_relaxed(val, base + TIMER_INT); in sprd_timer_clear_interrupt()
H A Dmps2-timer.c29 #define TIMER_INT 0xc macro
84 u32 status = readl_relaxed(ce->reg + TIMER_INT); in mps2_timer_interrupt()
91 writel_relaxed(1, ce->reg + TIMER_INT); in mps2_timer_interrupt()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-sprd.c23 #define TIMER_INT 0x14 macro
68 writel_relaxed(TIMER_INT_EN, base + TIMER_INT); in sprd_timer_enable_interrupt()
73 u32 val = readl_relaxed(base + TIMER_INT); in sprd_timer_clear_interrupt()
76 writel_relaxed(val, base + TIMER_INT); in sprd_timer_clear_interrupt()
H A Dmps2-timer.c29 #define TIMER_INT 0xc macro
84 u32 status = readl_relaxed(ce->reg + TIMER_INT); in mps2_timer_interrupt()
91 writel_relaxed(1, ce->reg + TIMER_INT); in mps2_timer_interrupt()
/dports/emulators/mess/mame-mame0226/src/devices/video/
H A Dcdp1861.cpp118 m_int_timer = timer_alloc(TIMER_INT); in device_start()
163 case TIMER_INT: in device_timer()
H A Dcdp1861.h89 TIMER_INT, enumerator
/dports/emulators/mame/mame-mame0226/src/devices/video/
H A Dcdp1861.cpp118 m_int_timer = timer_alloc(TIMER_INT); in device_start()
163 case TIMER_INT: in device_timer()
H A Dcdp1861.h89 TIMER_INT, enumerator
/dports/emulators/tilem/tilem-2.0/emu/x2/
H A Dx2_init.c45 tilem_z80_set_timer(calc, TIMER_INT, 1000, 9259, 1); in x2_reset()
H A Dx2.h37 #define TIMER_INT (TILEM_NUM_SYS_TIMERS + 1) macro
/dports/emulators/tilem/tilem-2.0/emu/x5/
H A Dx5_init.c48 tilem_z80_set_timer(calc, TIMER_INT, 1000, 5000, 1); in x5_reset()
H A Dx5.h35 #define TIMER_INT (TILEM_NUM_SYS_TIMERS + 1) macro
H A Dx5_io.c178 case TIMER_INT: in x5_z80_ptimer()
/dports/emulators/tilem/tilem-2.0/emu/x6/
H A Dx6_init.c48 tilem_z80_set_timer(calc, TIMER_INT, 1000, 5000, 1); in x6_reset()
H A Dx6.h35 #define TIMER_INT (TILEM_NUM_SYS_TIMERS + 1) macro
H A Dx6_io.c178 case TIMER_INT: in x6_z80_ptimer()
/dports/emulators/tilem/tilem-2.0/emu/x1/
H A Dx1_init.c49 tilem_z80_set_timer(calc, TIMER_INT, 6000, 6000, 1); in x1_reset()
H A Dx1.h38 #define TIMER_INT (TILEM_NUM_SYS_TIMERS + 1) macro
/dports/emulators/mess/mame-mame0226/src/devices/sound/
H A Dcdp1864.cpp125 m_int_timer = timer_alloc(TIMER_INT); in device_start()
175 case TIMER_INT: in device_timer()
/dports/emulators/mame/mame-mame0226/src/devices/sound/
H A Dcdp1864.cpp125 m_int_timer = timer_alloc(TIMER_INT); in device_start()
175 case TIMER_INT: in device_timer()

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