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Searched refs:TIM_CCER_CC1P (Results 1 – 25 of 53) sorted by relevance

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/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_tim.h441 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
496 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
497 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
1338 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1339 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1422 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
1444 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
1831 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
1832 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
2035 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32l1xx_hal_tim.h283 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for T…
284 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
359 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
1023 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TI…
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_tim.h441 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
496 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
497 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
1338 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1339 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1422 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
1444 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
1831 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
1832 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
2035 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32l1xx_hal_tim.h283 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for T…
284 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
359 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
1023 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TI…
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_tim.h441 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
496 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
497 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
1338 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1339 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1422 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
1444 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
1831 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
1832 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
2035 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32l1xx_hal_tim.h283 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for T…
284 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
359 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
1023 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TI…
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_tim.h441 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
496 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
497 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
1338 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1339 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1422 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
1444 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
1831 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
1832 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
2035 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32l1xx_hal_tim.h283 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for T…
284 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
359 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
1023 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TI…
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_ll_tim.h700 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
773 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
774 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
1852 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
1853 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
1968 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
2000 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
2581 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
2582 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
2785 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32h7xx_hal_tim.h488 #define TIM_INPUTCHANNELPOLARITY_FALLING TIM_CCER_CC1P /*!< Polarity for T…
489 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
577 #define TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< Capture/Compar…
1946 …(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC…
/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/mfd/
H A Dstm32-timers.h63 #define TIM_CCER_CC1P BIT(1) /* Capt/Comp 1 Polarity */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/mfd/
H A Dstm32-timers.h63 #define TIM_CCER_CC1P BIT(1) /* Capt/Comp 1 Polarity */ macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/mfd/
H A Dstm32-timers.h63 #define TIM_CCER_CC1P BIT(1) /* Capt/Comp 1 Polarity */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/
H A Dstm32g4xx_ll_tim.h729 #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
802 #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is…
803 #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is…
2612 MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_OC_ConfigOutput()
2613 (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_OC_ConfigOutput()
2734 …MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iC… in LL_TIM_OC_SetPolarity()
2768 …return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChann… in LL_TIM_OC_GetPolarity()
3439 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_Config()
3440 (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); in LL_TIM_IC_Config()
3643 MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), in LL_TIM_IC_SetPolarity()
[all …]
H A Dstm32g4xx_hal_tim.h542 #define TIM_INPUTCHANNELPOLARITY_FALLING TIM_CCER_CC1P /*!< Polarity for T…
543 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for T…
640 #define TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< Capture/Compar…
2264 …(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC…
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_ll_tim.c581 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); in LL_TIM_ENCODER_Init()
683 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); in LL_TIM_HALLSENSOR_Init()
844 MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity); in OC1Config()
1258 (TIM_CCER_CC1P | TIM_CCER_CC1NP), in IC1Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/
H A Dstm32g4xx_ll_tim.c563 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); in LL_TIM_ENCODER_Init()
665 tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); in LL_TIM_HALLSENSOR_Init()
832 MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity); in OC1Config()
1255 (TIM_CCER_CC1P | TIM_CCER_CC1NP), in IC1Config()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pwm/
H A Dpwm-stm32.c70 #define TIM_CCER_CC12P (TIM_CCER_CC1P | TIM_CCER_CC2P)
390 mask = TIM_CCER_CC1P << (ch * 4); in stm32_pwm_set_polarity()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/pwm/
H A Dpwm-stm32.c70 #define TIM_CCER_CC12P (TIM_CCER_CC1P | TIM_CCER_CC2P)
390 mask = TIM_CCER_CC1P << (ch * 4); in stm32_pwm_set_polarity()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pwm/
H A Dpwm-stm32.c70 #define TIM_CCER_CC12P (TIM_CCER_CC1P | TIM_CCER_CC2P)
390 mask = TIM_CCER_CC1P << (ch * 4); in stm32_pwm_set_polarity()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c701 tmpccer &= (uint16_t)~TIM_CCER_CC1P; in TIM_OC1Init()
1604 tmpccer &= (uint16_t)(~TIM_CCER_CC1P); in TIM_OC1PolarityConfig()
3101 tmpccer &= ((uint16_t)~TIM_CCER_CC1P) & ((uint16_t)~TIM_CCER_CC2P); in TIM_EncoderInterfaceConfig()
3219 tmpccer &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP); in TI1_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/
H A Dstm32f4xx_tim.c701 tmpccer &= (uint16_t)~TIM_CCER_CC1P; in TIM_OC1Init()
1604 tmpccer &= (uint16_t)(~TIM_CCER_CC1P); in TIM_OC1PolarityConfig()
3101 tmpccer &= ((uint16_t)~TIM_CCER_CC1P) & ((uint16_t)~TIM_CCER_CC2P); in TIM_EncoderInterfaceConfig()
3219 tmpccer &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP); in TI1_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/
H A Dstm32f37x_tim.c793 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); in TIM_OC1Init()
1617 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); in TIM_OC1PolarityConfig()
2923 …tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2… in TIM_EncoderInterfaceConfig()
3029 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); in TI1_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/
H A Dstm32f37x_tim.c793 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); in TIM_OC1Init()
1617 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); in TIM_OC1PolarityConfig()
2923 …tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2… in TIM_EncoderInterfaceConfig()
3029 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); in TI1_Config()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/
H A Dstm32f0xx_tim.c802 tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); in TIM_OC1Init()
1710 tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); in TIM_OC1PolarityConfig()
3108 …tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)) & (uint16_t)~((uint16_t)(TIM_CC… in TIM_EncoderInterfaceConfig()
3216 tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); in TI1_Config()

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