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Searched refs:TIM_DMABase_DCR (Results 1 – 14 of 14) sorted by relevance

/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F10x_StdPeriph_Driver/inc/
H A Dstm32f10x_tim.h547 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
566 ((BASE) == TIM_DMABase_DCR))
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F10x_StdPeriph_Driver/inc/
H A Dstm32f10x_tim.h547 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
566 ((BASE) == TIM_DMABase_DCR))
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/inc/
H A Dstm32f4xx_tim.h597 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
617 ((BASE) == TIM_DMABase_DCR) || \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/inc/
H A Dstm32f0xx_tim.h629 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
649 ((BASE) == TIM_DMABase_DCR) || \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/inc/
H A Dstm32f4xx_tim.h597 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
617 ((BASE) == TIM_DMABase_DCR) || \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/inc/
H A Dstm32f37x_tim.h638 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
659 ((BASE) == TIM_DMABase_DCR))
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/inc/
H A Dstm32f37x_tim.h638 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
659 ((BASE) == TIM_DMABase_DCR))
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F30x_StdPeriph_Driver/inc/
H A Dstm32f30x_tim.h703 #define TIM_DMABase_DCR ((uint16_t)0x0012) macro
726 ((BASE) == TIM_DMABase_DCR) || \
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32_hal_legacy.h782 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32_hal_legacy.h782 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32_hal_legacy.h782 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32_hal_legacy.h782 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/Legacy/
H A Dstm32_hal_legacy.h1067 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/Legacy/
H A Dstm32_hal_legacy.h1158 #define TIM_DMABase_DCR TIM_DMABASE_DCR macro