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Searched refs:TPU_TSTR (Results 1 – 25 of 86) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pwm/
H A Dpwm-renesas-tpu.c24 #define TPU_TSTR 0x00 /* Timer start register (shared) */ macro
133 value = ioread16(pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
140 iowrite16(value, pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/pwm/
H A Dpwm-renesas-tpu.c24 #define TPU_TSTR 0x00 /* Timer start register (shared) */ macro
133 value = ioread16(pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
140 iowrite16(value, pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pwm/
H A Dpwm-renesas-tpu.c24 #define TPU_TSTR 0x00 /* Timer start register (shared) */ macro
133 value = ioread16(pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
140 iowrite16(value, pwm->tpu->base + TPU_TSTR); in tpu_pwm_start_stop()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h97 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h97 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h97 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h97 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/sh/include/asm/
H A Dcpu_sh7720.h98 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/sh/include/asm/
H A Dcpu_sh7720.h97 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h241 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h241 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
H A Dcpu_sh7722.h241 #define TPU_TSTR 0xA4C90000 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/sh/include/asm/
H A Dcpu_sh7720.h121 #define TPU_TSTR (TPU_BASE + 0x00) macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/sh/include/asm/
H A Dcpu_sh7722.h218 #define TPU_TSTR 0xA4C90000 macro

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