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Searched refs:TestInsn (Results 1 – 16 of 16) sorted by relevance

/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/llvm11/llvm-11.0.1.src/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/TableGen/
H A DAsmPredicateCombining.td33 class TestInsn<int Opc, list<Predicate> Preds> : Instruction {
61 def insn1 : TestInsn<1, [AsmPred1]>;
64 def insn2 : TestInsn<2, [AsmPred2]>;
67 def insn3 : TestInsn<3, [AsmPred3]>;
70 def insn4 : TestInsn<4, [AsmPred1, AsmPred2]>;
73 def insn5 : TestInsn<5, [AsmPred1, AsmPred3]>;
76 def insn6 : TestInsn<6, []>;
/dports/textproc/jade/jade-1.2.1/style/
H A DInsn.h70 class TestInsn : public Insn {
72 TestInsn(InsnPtr, InsnPtr);
H A DInsn.cxx265 TestInsn::TestInsn(InsnPtr consequent, InsnPtr alternative) in TestInsn() function in DSSSL_NAMESPACE::TestInsn
270 const Insn *TestInsn::execute(VM &vm) const in execute()
H A DExpression.cxx322 new TestInsn(optimizeCompile(consequent_, in compile()
/dports/textproc/openjade/openjade-1.3.3-pre1/style/
H A DInsn.h70 class TestInsn : public Insn {
72 TestInsn(InsnPtr, InsnPtr);
H A DInsn.cxx267 TestInsn::TestInsn(InsnPtr consequent, InsnPtr alternative) in InheritedC()
272 const Insn *TestInsn::execute(VM &vm) const in InheritedC()
H A DExpression.cxx322 new TestInsn(optimizeCompile(consequent_, in compile()